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PL123S-09SC-R

P1-P3P4-P6P7-P9
PL123S-05/-09
Spread-Compatible Low Skew Zero Delay Buffer
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 94 4 -0800 • fax +1(408) 474- 1000 • www.micr el.com R ev 12/14/11 Page 4
ABSOLUTE MAXIMUM CONDITIONS
Supply Voltage to Ground Potential ...... –0.5V to 4.6V
DC Input Voltage ............................ V
SS
– 0.5V to 4.6V
Storage Temperature ..........................–65°C to 150°C
Junction Temperature………………………….. 150°C
Static Discharge Voltage
(per MIL-STD-883, Method 3015)…………..> 2000V
OPERATING CONDITIONS
Parameter
Description
Min.
Max.
Unit
V
DD
Supply Voltage
3.0
3.6
V
T
A
Commercial Operating Temperature (ambient temperature)
0
70
C
Industrial Operating Temperature (ambient te mperature)
-40
85
C
C
L
Load Capacitance, below 100 MHz
―
30
pF
Load Capacitance, above 100 MHz
―
10
pF
C
IN
Input Capacitance
―
7
pF
t
PU
Power-up time for all V
DD
s to reach minimum specified voltage
(power ramps must be monotonic)
0.05
250
ms
ELECTRICAL CHARACTERISTICS
Parameter
Description
Test Conditions
Min.
Max.
Unit
V
IL
Input LOW Voltage
–
0.8
V
V
IH
Input HIGH Voltage
2.5
–
V
I
IL
Input LOW Current
V
IN
= 0V
–
50
µA
I
IH
Input HIGH Current
V
IN
= V
DD
–
100
µA
V
OL
Output LOW Voltage
[4]
I
OL
= 8 mA
I
OL
= 12 mA
–
0.4
V
V
OH
Output HIGH Voltage
[4]
I
OH
= –8 mA
I
OL
= –12 mA
2.4
–
V
I
DD
Supply Current
(Unloaded Outputs)
66.67MHz with unloaded outputs
Commercial Temp.
–
32
mA
66.67MHz with unloaded outputs
Industrial Temp.
–
45
mA
Notes: 4. Parameter is guaranteed by design and characterization. Not 100% tested in production .
PL123S-05/-09
Spread-Compatible Low Skew Zero Delay Buffer
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 94 4 -0800 • fax +1(408) 474- 1000 • www.micr el.com R ev 12/14/11 Page 5
SWITCHING CHARACTERISTICS
[5 ]
Parameter
Name
Test Conditions
Min.
Typ.
Max.
Unit
t
1
Output Frequency
30-pF load
10
–
100
MHz
10-pF load
10
–
134
MHz
Duty Cycle
[4]
= t2 ÷ t1
Measured at 1.4V, F
OUT
= 66.67MHz
40
50
60
%
Duty Cycle
[4]
= t2 ÷ t1
Measured at 1.4V, F
OUT
<50MHz
45
50
55
%
t
3
Rise Time
[4]
Measured between 0.8V and 2.0V
–
2.5
–
ns
Rise Time
[4]
(High Drive)
Measured between 0.8V and 2.0V
–
1.5
–
ns
t
4
Fall Time
[4]
Measured between 0.8V and 2.0V
–
2.5
–
ns
Fall Time
[4]
(High Drive)
Measured between 0.8V and 2.0V
–
1.5
–
ns
t
5
Output to Output Skew
All outputs equally loaded
–
–
250
ps
t
6A
Delay, REF Rising Edge to
CLKOUT Rising Edge
[4]
Measured at VDD/2
–
0
±350
ps
t
6B
Delay, REF Rising Edge to
CLKOUT Rising Edge
[4]
Measured at VDD/2. Measured in PLL bypass
mode, PL123S-09 only.
1
5
8.5
ns
t
7
Device to Device Skew
[4]
Measured at VDD/2 on the CLKOUT pin
–
0
700
ps
t
8
Output Slew Rate
[4]
Measured between 0.8V and 2.0V using Test
Circuit #2
1
–
–
V/ns
t
J
Cycle to Cycle Jitter
[4]
Measured at 66.67 MHz, loaded outputs
–
75
200
ps
t
LOCK
PLL Lock Time
[4]
Stable power supply, valid clock presented on
REF pin
–
–
1.0
ms
Notes:
4. Parameter is guaranteed by design and characterization. Not 100% tested in production .
5. All parameters are specified with loaded outputs.
PL123S-05/-09
Spread-Compatible Low Skew Zero Delay Buffer
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 94 4 -0800 • fax +1(408) 474- 1000 • www.micr el.com R ev 12/14/11 Page 6
SWITCHING WAVEFORMS
1.4V
1.4V
t
2
t
1
VDD/2
INPUT
t
6
OUTPUT
VDD/2
1.4V
OUTPUT
t
5
OUTPUT
1.4V
Duty Cycle Timing
All Outputs Rise/Fall Time
Output-Output Skew
Input-Output Propagation Delay
t
3
t
4
OUTPUT
0.8V
2.0V
0V
3.3V
V
0.8V
2.0V
VDD/2
CLKOUT, Device 1
t
7
CLKOUT, Device 2
VDD/2
Device-Device Skew
P1-P3P4-P6P7-P9

PL123S-09SC-R

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Description:
Clock Buffer Low Skew 1:9 Zero Delay Buffe
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