LTC3828EG#PBF Datasheet LTC3828EG#TRPBF, LTC3828EUH#TRPBF, LTC3828EUH#PBF | P19-P21

LTC3828

3828fc

bypassing is necessary to supply the high transient cur-

rents required by the MOSFET gate drivers and to prevent

interaction between channels.

Higher input voltage applications in which large MOSFETs

are being driven at high frequencies may cause the maxi-

mum junction temperature rating for the IC to be exceeded.

The system supply current is normally dominated by the

gate charge current. Additional external loading of the

INTV

also needs to be taken into account for the power

dissipation calculations.

The absolute maximum rating for the INTV

Pin is 50mA.

To prevent maximum junction temperature from being

exceeded, the input supply current must be checked

operating in continuous mode at maximum V

Topside MOSFET Driver Supply (C

, D

)

External bootstrap capacitors, C

, connected to the BOOST

pins supply the gate drive voltages for the topside MOSFETs.

Capacitor C

in the Functional Diagram is charged though

external diode D

from INTV

when the SW pin is low.

When one of the topside MOSFETs is to be turned on, the

driver places the C

voltage across the gate source of the

desired MOSFET. This enhances the MOSFET and turns on

the topside switch. The switch node voltage, SW, rises to

and the BOOST pin follows. With the topside MOSFET

on, the boost voltage is above the input supply: V

BOOST

= V

+ V

INTVCC

. The value of the boost capacitor, C

needs to be 100 times that of the total input capacitance

of the topside MOSFET(s). The reverse breakdown of the

external Schottky diode must be greater than V

IN(MAX)

When adjusting the gate-drive level, the ﬁ nal arbiter is the

total input current for the regulator. If a change is made

and the input current decreases, then the efﬁ ciency has

improved. If there is no change in input current, then there

is no change in efﬁ ciency.

Output Voltage

The output voltages are each set by an external feedback

resistive divider carefully placed across the output capaci-

tor. The resultant feedback signal is compared with the

internal precision 0.800V voltage reference by the error

ampliﬁ er. The output voltage is given by the equation:

OUT

⎛

⎝

⎜

⎞

⎠

⎟

08 1

where R1 and R2 are deﬁ ned in Figure 1.

SENSE

/SENSE

–

Pins

The common mode input range of the current comparator

sense pins is from 0V to (1.1)INTV

. Continuous linear

operation is guaranteed throughout this range allowing

output voltage setting from 0.8V to 7.7V. A differential

NPN input stage is biased with internal resistors from an

internal 2.4V source as shown in the Functional Diagram.

This requires that current either be sourced or sunk from

the SENSE pins depending on the output voltage. If the

output voltage is below 2.4V current will ﬂ ow out of both

SENSE pins to the main output. The output can be easily

preloaded by the V

OUT

resistive divider to compensate

for the current comparator’s negative input bias current.

The maximum current ﬂ owing out of each pair of SENSE

pins is:

SENSE

+ I

SENSE

–

= (2.4V – V

OUT

)/24k

Since V

OSENSE

is servoed to the 0.8V reference voltage,

we can choose R1 in Figure 1 to have a maximum value

to absorb this current.

MAX

OUT

124

()

.–

⎛

⎝

⎜

⎞

⎠

⎟

for V

OUT

< 2.4V

Regulating an output voltage of 1.8V, the maximum value

of R1 should be 32k. Note that for an output voltage above

2.4V, R1 has no maximum value necessary to absorb the

sense currents; however, R1 is still bounded by the V

OSENSE

feedback current.

RUN and Soft-Start

The LTC3828 RUN pins shut down their respective chan-

nels independently. The LTC3828 is put in a low quiescent

current state (I

< 30µA) if both RUN pin voltages are

below 1V. TRCKSS pins are actively pulled to ground in

this shutdown state. Once the RUN pin voltages are above

1.5V, the respective channel of the LTC3828 is powered

APPLICATIONS INFORMATION

LTC3828

3828fc

up. The LTC3828 has the ability to either soft-start by

itself with an external soft-start capacitor or tracking the

output of the other channel or supply. When the device

is conﬁ gured to soft-start by itself, an external soft-start

capacitor should be connected to the TRCKSS pin. A soft-

start current of 1.2µA is to charge the soft-start capacitor

. Note that soft-start during this mode is achieved not

by limiting the maximum output current of the controller

but by controlling the ramp rate of the output voltage.

As a matter of fact, current foldback is defeated during

soft-start or tracking. During this phase, the LTC3828 is

basically ramping the reference voltage until this voltage

is 7.5% below the 0.8V reference. The total soft-start time

can be estimated as:

SOFT-START

= 0.925 • 0.8V • C

/1.2µA

The LTC3828 is designed such that the TRCKSS pin is not

actively pulled down if only one of the channels is shut

down. In this case, the TRCKSS pin voltage could be higher

than 0.8V. If this particular channel is powered up again,

the soft-start for this particular channel is provided by an

internal soft-start timer about 450µs. The internal soft-start

timer will also be in effect if the LTC3828 is trying to track

an output supply that is already powered up.

In any case, the force continuous mode is disabled and

PGOOD signal is forced low during the ﬁ rst 90% of the

soft-start phase. This time can be estimated for external

soft-start as:

FORCE

= 0.9 • 0.925 • 0.8V • C

/1.2µA

For internal soft-start, it will be 450µs.

Fault Conditions: Current Limit and Current Foldback

The current comparators have a maximum sense volt-

age of 75mV resulting in a maximum MOSFET current

of 75mV/R

SENSE

. The maximum value of current limit

generally occurs with the largest V

at the highest ambi-

ent temperature, conditions that cause the highest power

dissipation in the top MOSFET.

Each controller includes current foldback to help further

limit load current when the output is shorted to ground. If

the output falls below 70% of its nominal output level, then

the maximum sense voltage is progressively lowered from

75mV to 25mV. Under short-circuit conditions with very

low duty cycles, the controller will begin cycle skipping

in order to limit the short-circuit current. In this situation

the bottom MOSFET will be dissipating most of the power

but less than in normal operation. The short-circuit ripple

current is determined by the minimum on-time, t

ON(MIN)

of each controller (typically 200ns), the input voltage and

inductor value:

ΔI

L(SC)

= t

ON(MIN)

/L)

The resulting short-circuit current is:

SENSE

LSC

25 1

–

()

Fault Conditions: Overvoltage Protection (Crowbar)

The overvoltage crowbar is designed to blow a system

input fuse when the output voltage of the regulator rises

much higher than nominal levels. The crowbar causes huge

currents to ﬂ ow, that blow the fuse to protect against a

shorted top MOSFET if the short occurs while the control-

ler is operating.

A comparator monitors the output for overvoltage con-

ditions. The comparator (OV) detects overvoltage faults

greater than 7.5% above the nominal output voltage. When

this condition is sensed, the top MOSFET is turned off and

the bottom MOSFET is turned on until the overvoltage

condition is cleared. The output of this comparator is

only latched by the overvoltage condition itself and will

therefore allow a switching regulator system having a poor

PC layout to function while the design is being debugged.

The bottom MOSFET remains on continuously for as long

as the OV condition persists; if V

OUT

returns to a safe level,

normal operation automatically resumes. A shorted top

MOSFET will result in a high current condition which will

open the system fuse. The switching regulator will regulate

properly with a leaky top MOSFET by altering the duty

cycle to accommodate the leakage.

Phase-Locked Loop and Frequency Synchronization

The IC has a phase-locked loop comprised of an internal

voltage controlled oscillator and phase detector. This al-

lows the top MOSFET turn-on to be locked to the rising

edge of an external source. The frequency range of the

voltage controlled oscillator is ±50% around the center

APPLICATIONS INFORMATION

LTC3828

3828fc

frequency f

. A voltage applied to the PLLFLTR pin of 1.2V

corresponds to a frequency of approximately 400kHz. The

nominal operating frequency range of the IC is 260kHz to

550kHz.

The phase detector used is an edge sensitive digital type

which provides zero degrees phase shift between the ex-

ternal and internal oscillators. This type of phase detector

will not lock up on input frequencies close to the harmonics

of the VCO center frequency. The PLL hold-in range, Δf

is equal to the capture range, Δf

Δf

= Δf

= ±0.5 f

(260kHz-550kHz)

The output of the phase detector is a complementary pair

of current sources charging or discharging the external

ﬁ lter network on the PLLFLTR pin.

If the external frequency, f

PLLIN

, is greater than the oscillator

frequency, f

OSC

, current is sourced continuously, pulling

up the PLLFLTR pin. When the external frequency is less

than f

OSC

, current is sunk continuously, pulling down

the PLLFLTR pin. If the external and internal frequencies

are the same but exhibit a phase difference, the current

sources turn on for an amount of time corresponding to the

phase difference. Thus the voltage on the PLLFLTR pin is

adjusted until the phase and frequency of the external and

internal oscillators are identical. At this stable operating

point the phase comparator output is open and the ﬁ lter

capacitor C

holds the voltage. The IC’s FCB/PLLIN pin

must be driven from a low impedance source such as a

logic gate located close to the pin. When using multiple

ICs for a phase-locked system, the PLLFLTR pin of the

master oscillator should be biased at a voltage that will

guarantee the slave oscillator(s) ability to lock onto the

master’s frequency. A DC voltage of 0.7V to 1.7V applied

to the master oscillator’s PLLFLTR pin is recommended

in order to meet this requirement. The resultant operating

frequency can range from 300kHz to 500kHz.

The loop ﬁ lter components (C

, R

) smooth out the cur-

rent pulses from the phase detector and provide a stable

input to the voltage controlled oscillator. The ﬁ lter compo-

nents C

and R

determine how fast the loop acquires

lock. Typically R

=10k and C

is 0.01µF to 0.1µF.

Minimum On-Time Considerations

Minimum on-time, t

ON(MIN)

, is the smallest time dura-

tion that each controller is capable of turning on the top

MOSFET. It is determined by internal timing delays and the

gate charge required to turn on the top MOSFET. Low duty

cycle applications may approach this minimum on-time

limit and care should be taken to ensure that

ON MIN

OUT

()

If the duty cycle falls below what can be accommodated

by the minimum on-time, the controller will begin to skip

cycles. The output voltage will continue to be regulated,

but the ripple voltage and current will increase.

The minimum on-time for each controller is approximately

120ns. However, as the peak sense voltage decreases the

minimum on-time gradually increases up to about 300ns.

This is of particular concern in forced continuous applica-

tions with low ripple current at light loads. If the duty cycle

drops below the minimum on-time limit in this situation,

a signiﬁ cant amount of cycle skipping can occur with cor-

respondingly larger current and voltage ripple.

Voltage Positioning

Voltage positioning can be used to minimize peak-to-peak

output voltage excursions under worst-case transient

loading conditions. The open-loop DC gain of the control

loop is reduced depending upon the maximum load step

speciﬁ cations. Voltage positioning can easily be added

to either or both controllers by loading the I

pin with

a resistive divider having a Thevenin equivalent voltage

source equal to the midpoint operating voltage range of

the error ampliﬁ er, or 1.2V (see Figure 10).

APPLICATIONS INFORMATION

INTV

3828 F10

LTC3828

Figure 10. Active Voltage Positioning Applied to the LTC3828

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LTC3828EG#PBF

Mfr. #:

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Manufacturer:

Analog Devices / Linear Technology

Description:

Switching Voltage Regulators Dual, 2-Phase Controller, w/ Tracking PLL

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LTC3828EG#PBF

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