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LTC3828EG#PBF

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P32
LTC3828
22
3828fc
The resistive load reduces the DC loop gain while main-
taining the linear control range of the error amplifi er.
The maximum output voltage deviation can theoretically
be reduced to half or alternatively the amount of output
capacitance can be reduced for a particular application. A
complete explanation is included in Design Solutions 10.
(See www.linear.com)
Effi ciency Considerations
The percent effi ciency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the effi ciency and which change would
produce the most improvement. Percent effi ciency can
be expressed as:
%Effi ciency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percent-
age of input power.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of the
losses in LTC3828 circuits: 1) IC V
IN
current, 2) INTV
CC
regulator current, 3) I
2
R losses, 4) Topside MOSFET
transition losses.
1. The V
IN
current has two components: the fi rst is the DC
supply current given in the Electrical Characteristics table,
which excludes MOSFET driver and control currents; V
IN
current typically results in a small (<0.1%) loss.
2. INTV
CC
current is the sum of the MOSFET driver and
control currents. The MOSFET driver current results from
switching the gate capacitance of the power MOSFETs.
Each time a MOSFET gate is switched from low to high
to low again, a packet of charge dQ moves from INTV
CC
to ground. The resulting dQ/dt is a current out of INTV
CC
that is typically much larger than the control circuit current.
In continuous mode, I
GATECHG
=f(Q
T
+ Q
B
), where Q
T
and
Q
B
are the gate charges of the topside and bottom side
MOSFETs.
3. I
2
R losses are predicted from the DC resistances of
the fuse (if used), MOSFET, inductor, current sense resis-
tor, and input and output capacitor ESR. In continuous
mode the average output current fl ows through L and
R
SENSE
, but is “chopped” between the topside MOSFET
and the synchronous MOSFET. If the two MOSFETs have
approximately the same R
DS(ON)
, then the resistance of
one MOSFET can simply be summed with the resistances
of L, R
SENSE
and ESR to obtain I
2
R losses. For example, if
each R
DS(ON)
= 30m, R
L
= 50m, R
SENSE
= 10m and
R
ESR
= 40m (sum of both input and output capacitance
losses), then the total resistance is 130m. This results
in losses ranging from 3% to 13% as the output current
increases from 1A to 5A for a 5V output, or a 4% to 20%
loss for a 3.3V output. Effi ciency varies as the inverse
square of V
OUT
for the same external components and
output power level. The combined effects of increasingly
lower output voltages and higher currents required by
high performance digital systems is not doubling but
quadrupling the importance of loss terms in the switching
regulator system!
4. Transition losses apply only to the topside MOSFET(s),
and become signifi cant only when operating at high input
voltages (typically 15V or greater). Transition losses can
be estimated from:
Transition Loss = V
IN
()
⎛
⎝
⎜
⎞
⎠
⎟
()
()()
+
⎛
⎝
⎜
⎞
⎠
⎟
2
2
1
5
1
••
–
I
R
Cf
VV V
MAX
DR
MILLER
TH TH
Other “hidden” losses such as copper trace and internal
battery resistances can account for an additional 5% to
10% effi ciency degradation in portable systems. It is very
important to include these “system” level losses during
the design phase. The internal battery and fuse resistance
losses can be minimized by making sure that C
IN
has ad-
equate charge storage and very low ESR at the switching
frequency. A 25W supply will typically require a minimum of
20µF to 40µF of capacitance having a maximum of 20m to
50m of ESR. The LTC3828 2-phase architecture typically
halves this input capacitance requirement over competing
solutions. Other losses including Schottky conduction
losses during dead-time and inductor core losses generally
account for less than 2% total additional loss.
APPLICATIONS INFORMATION
LTC3828
23
3828fc
Checking Transient Response
The regulator loop response can be checked by looking at
the load current transient response. Switching regulators
take several cycles to respond to a step in DC (resistive)
load current. When a load step occurs, V
OUT
shifts by an
amount equal to ΔI
LOAD
(ESR), where ESR is the effective
series resistance of C
OUT
. ΔI
LOAD
also begins to charge or
discharge C
OUT
generating the feedback error signal that
forces the regulator to adapt to the current change and
return V
OUT
to its steady-state value. During this recovery
time V
OUT
can be monitored for excessive overshoot or ring-
ing, which would indicate a stability problem. OPTI-LOOP
compensation allows the transient response to be optimized
over a wide range of output capacitance and ESR values.
The availability of the I
TH
pin not only allows optimization
of control loop behavior but also provides a DC coupled
and AC fi ltered closed-loop response test point. The DC
step, rise time and settling at this test point truly refl ects the
closed-loop response. Assuming a predominantly second
order system, phase margin and/or damping factor can be
estimated using the percentage of overshoot seen at this
pin. The bandwidth can also be estimated by examining the
rise time at the pin. The I
TH
external components shown
in the Figure 15 circuit will provide an adequate starting
point for most applications.
The I
TH
series R
C
-C
C
fi lter sets the dominant pole-zero
loop compensation. The values can be modifi ed slightly
(from 0.5 to 2 times their suggested values) to optimize
transient response once the fi nal PC layout is done and
the particular output capacitor type and value have been
determined. The output capacitors need to be selected
because the various types and values determine the loop
gain and phase. An output current pulse of 20% to 80%
of full-load current having a rise time of 1µs to 10µs will
produce output voltage and I
TH
pin waveforms that will
give a sense of the overall loop stability without break-
ing the feedback loop. Placing a power MOSFET directly
across the output capacitor and driving the gate with an
appropriate signal generator is a practical way to produce
a realistic load step condition. The initial output voltage
step resulting from the step change in output current may
not be within the bandwidth of the feedback loop, so this
signal cannot be used to determine phase margin. This
is why it is better to look at the I
TH
pin signal which is in
the feedback loop and is the fi ltered and compensated
control loop response. The gain of the loop will be in-
creased by increasing R
C
and the bandwidth of the loop
will be increased by decreasing C
C
. If R
C
is increased by
the same factor that C
C
is decreased, the zero frequency
will be kept the same, thereby keeping the phase shift the
same in the most critical frequency range of the feedback
loop. The output voltage settling behavior is related to the
stability of the closed-loop system and will demonstrate
the actual overall supply performance.
A second, more severe transient is caused by switching
in loads with large (>1µF) supply bypass capacitors. The
discharged bypass capacitors are effectively put in parallel
with C
OUT
, causing a rapid drop in V
OUT
. No regulator can
alter its delivery of current quickly enough to prevent this
sudden step change in output voltage if the load switch
resistance is low and it is driven quickly. If the ratio of
C
LOAD
to C
OUT
is greater than1:50, the switch rise time
should be controlled so that the load rise time is limited
to approximately 25 • C
LOAD
. Thus a 10µF capacitor would
require a 250µs rise time, limiting the charging current
to about 200mA.
Automotive and Low V
IN
Considerations
As battery-powered devices go mobile, there is a natural
interest in plugging into the cigarette lighter in order to
conserve or even recharge battery packs during operation.
But before you connect, be advised: you are plugging into
the supply from hell. The main power line in an automobile
is the source of a number of nasty potential transients, in-
cluding load-dump, reverse-battery and double-battery.
Load-dump is the result of a loose battery cable. When the
cable breaks connection, the fi eld collapse in the alterna-
tor can cause a positive spike as high as 60V which takes
several hundred milliseconds to decay. Reverse-battery is
just what it says, while double-battery is a consequence of
tow-truck operators fi nding that a 24V jump start cranks
cold engines faster than 12V.
The network shown in Figure 11a is the most straight-
forward approach to protect a DC/DC converter from the
ravages of an automotive power line. The series diode
prevents current from fl owing during reverse-battery,
while the transient suppressor clamps the input voltage
APPLICATIONS INFORMATION
LTC3828
24
3828fc
during load-dump. Note that the transient suppressor
should not conduct during double-battery operation, but
must still clamp the input voltage below breakdown of the
converter. Although the LTC3828 have a maximum input
voltage of 30V, most applications will also be limited to
30V by the MOSFET BVD
SS
.
occurs at the maximum input voltage. Tie the PLLFLTR
pin to a resistive divider from the INTV
CC
pin, generating
0.7V for 300kHz operation. The minimum inductance for
30% ripple current is:
ΔI
V
fL
V
V
L
OUT OUT
IN
=
⎛
⎝
⎜
⎞
⎠
⎟
()()
–1
A 4.7µH inductor will produce 23% ripple current and a
3.3µH will result in 33%. The peak inductor current will
be the maximum DC value plus one half the ripple cur-
rent, or 5.84A, for the 3.3µH value. Increasing the ripple
current will also help ensure that the minimum on-time
of 100ns is not violated. The minimum on-time occurs at
maximum V
IN
:
t
V
Vf
V
V kHz
ns
ON MIN
OUT
IN MAX
()
()
.
()
== =
18
22 300
273
The R
SENSE
resistor value can be calculated by using the
maximum current sense voltage specifi cation with some
accommodation for tolerances:
R
mV
A
SENSE
≤≈Ω
60
584
001
.
.
Since the output voltage is below 2.4V the output resis-
tive divider will need to be sized to not only set the output
voltage but also to absorb the SENSE pin’s specifi ed input
current.
Rk
V
VV
k
V
VV
k
MAX
OUT
124
08
24
24
08
24 18
32
()
.
.–
.
.–.
=
⎛
⎝
⎜
⎞
⎠
⎟
=
⎛
⎝
⎜
⎞
⎠
⎟
=
Choosing 1% resistors: R1 = 25.5k and R2 = 32.4k yields
an output voltage of 1.816V.
The power dissipation on the topside MOSFET can be easily
estimated. Choosing a Fairchild FDS6982S dual MOSFET
results in: R
DS(ON)
= 0.035/0.022, C
MILLER
= 215pF. At
maximum input voltage with T(estimated) = 50°C:
APPLICATIONS INFORMATION
V
IN
3828 F11a
LTC3828
TRANSIENT VOLTAGE
SUPPRESSOR
GENERAL INSTRUMENT
1.5KA24A
50A I
PK
RATING
12V
Figure 11a. Automotive Application Protection
For applications where the main input power is 5V, tie the
V
IN
, INTV
CC
and DRV
CC
pins together and tie the combined
pins to the 5V input with a 1 or 2.2 resistor as shown
in Figure 11b to minimize the voltage drop caused by the
gate charge current. This will override the INTV
CC
regula-
tor and will prevent INTV
CC
from dropping too low due to
the dropout voltage. Make sure the INTV
CC
voltage is at
or exceeds the R
DS(ON)
test voltage for the MOSFET which
is typically 4.5V for logic-level devices.
Figure 11b. Setup for a 5V Input
R
VIN
1Ω
C
IN
*LTC3828EUH ONLY
3828 F11b
5V
C
INTVCC
4.7µF
+
LTC3828
INTV
CC
V
IN
DRV
CC*
Design Example
As a design example for one channel, assume V
IN
=
12V(nominal), V
IN
= 22V(max), V
OUT
= 1.8V, I
MAX
= 5A
and f = 300kHz.
The inductance value is chosen fi rst based on a 30% ripple
current assumption. The highest value of ripple current
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LTC3828EG#PBF

Mfr. #:
Buy LTC3828EG#PBF
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators Dual, 2-Phase Controller, w/ Tracking PLL
Lifecycle:
New from this manufacturer.
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