NXP Semiconductors
BUK98150-55
N-channel TrenchMOS logic level FET
BUK98150-55 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved
Product data sheet 19 March 2014 4 / 11
003aaf219
T
(mb)
(°C)
20 16012060 10040 14080
40
60
20
80
100
WDSS
(%)
0
I
D
= 1.9 A
Fig. 3. Normalised drain-source non-repetitive
avalanche energy rating; avalanche energy as a
function of mounting base temperature
40
60
20
80
100
P
der
(%)
0
T
mb
(°C)
0 16012040 80
003aaf205
Fig. 4. Normalized total power dissipation as a
function of mounting base temperature
9. Thermal characteristics
Table 6. Thermal characteristics
Symbol Parameter Conditions Min Typ Max Unit
R
th(j-sp)
thermal resistance
from junction to solder
point
mounted on any printed-circuit board - 12 15 K/W
R
th(j-a)
thermal resistance
from junction to
ambient
mounted on a printed-circuit board - 120 - K/W
003aaf208
1
10
- 1
10
10
2
Z
th(j-sp)
(K/W)
10
- 2
t
p
(s)
10
- 6
10110
- 1
10
- 2
10
- 5
10
- 3
10
- 4
0
δ = 0.5
t
p
t
p
T
P
t
T
δ =
0.02
0.05
0.1
0.2
Fig. 5. Transient thermal impedance from junction to solder point as a function of pulse duration
