DS1305
10 of 22
Figure 4. POWER-SUPPLY CONFIGURATIONS
NOTE: DEVICE DOES NOT PROVIDE AUTOMATIC WRITE PROTECTION.
NOTE: DEVICE IS WRITE-PROTECTED IF V
CC
< V
CCTP
.
CONFIGURATION 1: BACKUP SUPPLY IS
NONRECHARGEABLE LITHIUM BATTERY
CONFIGURATION 2: BACKUP SUPPLY IS A
RECHARGEABLE BATTERY OR SUPER
CAPACITOR
CONFIGURATION 3: BATTERY OPERATE
MODE
DS1305
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SERIAL INTERFACE
The DS1305 offers the flexibility to choose between two serial interface modes. The DS1305 can
communicate with the SPI interface or with a standard 3-wire interface. The interface method used is
determined by the SERMODE pin. When this pin is connected to V
CC
, SPI communication is selected.
When this pin is connected to ground, standard 3-wire communication is selected.
SERIAL PERIPHERAL INTERFACE (SPI)
The serial peripheral interface (SPI) is a synchronous bus for address and data transfer, and is used when
interfacing with the SPI bus on specific Motorola microcontrollers such as the 68HC05C4 and the
68HC11A8. The SPI mode of serial communication is selected by tying the SERMODE pin to V
CC
. Four
pins are used for the SPI. The four pins are the SDO (serial data out), SDI (serial data in), CE (chip
enable), and SCLK (serial clock). The DS1305 is the slave device in an SPI application, with the
microcontroller being the master.
The SDI and SDO pins are the serial data input and output pins for the DS1305, respectively. The CE
input is used to initiate and terminate a data transfer. The SCLK pin is used to synchronize data
movement between the master (microcontroller) and the slave (DS1305) devices.
The shift clock (SCLK), which is generated by the microcontroller, is active only during address and data
transfer to any device on the SPI bus. The inactive clock polarity is programmable in some
microcontrollers. The DS1305 determines the clock polarity by sampling SCLK when CE becomes
active. Therefore, either SCLK polarity can be accommodated. Input data (SDI) is latched on the internal
strobe edge and output data (SDO) is shifted out on the shift edge (Figure 5). There is one clock for each
bit transferred. Address and data bits are transferred in groups of eight, MSB first.
Figure 5. SERIAL CLOCK AS A FUNCTION OF MICROCONTROLLER CLOCK
POLARITY (CPOL)
CE
CPOL = 1
SCLK
DATA LATCH (WRITE)
SHIFT DATA OUT (READ)
CPOL = 0
SCLK
DATA LATCH (WRITE)
SHIFT DATA OUT (READ)
NOTE 1: CPHA BIT POLARITY (IF APPLICABLE) MAY NEED TO BE SET ACCORDINGLY.
NOTE 2: CPOL IS A BIT THAT IS SET IN THE MICROCONTROLLER’S CONTROL REGISTER.
NOTE 3: SDO REMAINS AT HIGH-Z UNTIL 8 BITS OF DATA ARE READY TO BE SHIFTED OUT DURING A READ.
DS1305
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* SCLK CAN BE EITHER POLARITY.
ADDRESS AND DATA BYTES
Address and data bytes are shifted MSB first into the serial data input (SDI) and out of the serial data
output (SDO). Any transfer requires the address of the byte to specify a write or read to either a RTC or
RAM location, followed by one or more bytes of data. Data is transferred out of the SDO for a read
operation and into the SDI for a write operation (Figures 6 and 7).
Figure 6. SPI SINGLE-BYTE WRITE
Figure 7. SPI SINGLE-BYTE READ
The address byte is always the first byte entered after CE is driven high. The most significant bit (A7) of
this byte determines if a read or write takes place. If A7 is 0, one or more read cycles occur. If A7 is 1,
one or more write cycles occur.
Data transfers can occur one byte at a time or in multiple-byte burst mode. After CE is driven high an
address is written to the DS1305. After the address, one or more data bytes can be written or read. For a
single-byte transfer, one byte is read or written and then CE is driven low. For a multiple-byte transfer,
however, multiple bytes can be read or written to the DS1305 after the address has been written. Each
read or write cycle causes the RTC register or RAM address to automatically increment. Incrementing
continues until the device is disabled. When the RTC is selected, the address wraps to 00h after
incrementing to 1Fh (during a read) and wraps to 80h after incrementing to 9Fh (during a write). When
the RAM is selected, the address wraps to 20h after incrementing to 7Fh (during a read) and wraps to
A0h after incrementing to FFh (during a write).
* SCLK CAN BE EITHER POLARITY.
SERMODE = V
CC
SERMODE = V
CC

DS1305EN

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Real Time Clock Serial Alarm RTC 3-Wire
Lifecycle:
New from this manufacturer.
Delivery:
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