DS1305
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PIN DESCRIPTION (continued)
PIN
DIP TSSOP
NAME
FUNCTION
12 15 SDI
Serial Data Input. When SPI communication is selected, the SDI pin is the
serial data input for the SPI bus. When 3-wire communication is selected, this
pin must be tied to the SDO pin (the SDI and SDO pins function as a single I/O
pin when tied together).
13 16 SDO
Serial Data Output. When SPI communication is selected, the SDO pin is the
serial data output for the SPI bus. When 3-wire communication is selected, this
pin must be tied to the SDI pin (the SDI and SDO pins function as a single I/O
pin when tied together).
14 17 V
CCIF
Interface Logic Power-Supply Input. The V
CCIF
pin allows the DS1305 to drive
SDO and PF output pins to a level that is compatible with the interface logic,
thus allowing an easy interface to 3V logic in mixed supply systems. This pin is
physically connected to the source connection of the p-channel transistors in
the output buffers of the SDO and PF pins.
15 18
PF
Active-Low Power-Fail Output. The PF pin is used to indicate loss of the
primary power supply (V
CC1
). When V
CC1
is less than V
CC2
or is less than V
BAT
,
the PF pin is driven low.
16 20 V
CC1
Primary Power Supply. DC power is provided to the device on this pin.
OPERATION
The block diagram in Figure 1 shows the main elements of the serial alarm RTC. The following
paragraphs describe the function of each pin.
Figure 1. BLOCK DIAGRAM
1Hz
OSCILLATOR AND
COUNTDOWN CHAIN
DS1305
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RECOMMENDED LAYOUT FOR CRYSTAL
CLOCK ACCURACY
The accuracy of the clock is dependent upon the accuracy of the crystal and the accuracy of the match
between the capacitive load of the oscillator circuit and the capacitive load for which the crystal was
trimmed. Additional error is added by crystal frequency drift caused by temperature shifts. External
circuit noise coupled into the oscillator circuit can result in the clock running fast. Refer to Application
Note 58, “Crystal Considerations with Dallas Real-Time Clocks” for detailed information.
Table 1. Crystal Specifications
PARAMETER SYMBOL MIN TYP MAX UNITS
Nominal Frequency f
O
32.768 kHz
Series Resistance ESR 45 k
Load Capacitance C
L
6 pF
Note: The crystal, traces, and crystal input pins should be isolated from RF generating signals. Refer to
Applications Note 58: Crystal Considerations for Dallas Real-Time Clocks for additional specifications.
CLOCK, CALENDAR, AND ALARM
The time and calendar information is obtained by reading the appropriate register bytes. The RTC
registers and user RAM are illustrated in Figure 2. The time, calendar, and alarm are set or initialized by
writing the appropriate register bytes. Note that some bits are set to 0. These bits always read 0 regardless
of how they are written. Also note that registers 12h to 1Fh (read) and registers 92h to 9Fh are reserved.
These registers always read 0 regardless of how they are written. The contents of the time, calendar, and
alarm registers are in the BCD format. The day register increments at midnight. Values that correspond to
the day of week are user-defined but must be sequential (e.g., if 1 equals Sunday, 2 equals Monday and so
on). Illogical time and date entries result in undefined operation.
Except where otherwise noted, the initial power on state of all registers is not defined. Therefore, it is
important to enable the oscillator (EOSC = 0) and disable write protect (WP = 0) during initial
configuration.
WRITING TO THE CLOCK REGISTERS
The internal time and date registers continue to increment during write operations. However, the
countdown chain is reset when the seconds register is written. Writing the time and date registers within
one second after writing the seconds register ensures consistent data.
Terminating a write before the last bit is sent aborts the write for that byte.
Local ground plane (Layer 2)
crystal
X1
X2
GND
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READING FROM THE CLOCK REGISTERS
Buffers are used to copy the time and date register at the beginning of a read. When reading in burst
mode, the user copy is static while the internal registers continue to increment.
Figure 2. RTC REGISTERS AND ADDRESS MAP
HEX ADDRESS
READ WRITE
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 RANGE
00h 80h 0 10 Seconds Seconds 00–59
01h 81h 0 10 Minutes Minutes 00–59
P 01–12 + P/A
12
A
02h 82h 0
24 10
10 Hour Hours
00–23
03h 83h 0 0 0 0 Day 1–7
04h 84h 0 0 10 Date Date 1–31
05h 85h 0 0 10 Month Month 01–12
06h 86h 10 Year Year 00–99
— —
Alarm 0
07h 87h M 10 Seconds Alarm Seconds Alarm 00–59
08h 88h M 10 Minutes Alarm Minutes Alarm 00–59
P
12
A
01–12 + P/A
09h 89h M
24 10
10 Hour Hour Alarm
00–23
0Ah 8Ah M 0 0 0 Day Alarm 01–07
— —
Alarm 1
0Bh 8Bh M 10 Seconds Alarm Seconds Alarm 00–59
0Ch 8Ch M 10 Minutes Alarm Minutes Alarm 00–59
P
12
A
01–12 + P/A
0Dh 8Dh M
24 10
10 Hour Hour Alarm
00–23
0Eh 8Eh M 0 0 0 Day Alarm 01–07
0Fh 8Fh Control Register
10h 90h Status Register
11h 91h Trickle Charger Register
12h–1Fh 92h–9Fh Reserved
20h–7Fh A0h–FFh 96 Bytes User RAM 00–FF
Note: Range for alarm registers does not include mask’m’ bits.
The DS1305 can be run in either 12-hour or 24-hour mode. Bit 6 of the hours register is defined as the
12- or 24-hour mode select bit. When high, the 12-hour mode is selected. In the 12-hour mode, bit 5 is the
AM/PM bit with logic high being PM. In the 24-hour mode, bit 5 is the second 10-hour bit (20 to 23
hours).
The DS1305 contains two time-of-day alarms. Time-of-day Alarm 0 can be set by writing to registers 87h
to 8Ah. Time-of-day Alarm 1 can be set by writing to registers 8Bh to 8Eh. The alarms can be
programmed (by the INTCN bit of the control register) to operate in two different modes; each alarm can
drive its own separate interrupt output or both alarms can drive a common interrupt output. Bit 7 of each
of the time-of-day alarm registers are mask bits (Table 2). When all of the mask bits are logic 0, a time-
of-day alarm only occurs once per week when the values stored in timekeeping registers 00h to 03h
match the values stored in the time-of-day alarm registers. An alarm is generated every day when bit 7 of
the day alarm register is set to a logic 1. An alarm is generated every hour when bit 7 of the day and hour
alarm registers is set to a logic 1. Similarly, an alarm is generated every minute when bit 7 of the day,

DS1305EN

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Real Time Clock Serial Alarm RTC 3-Wire
Lifecycle:
New from this manufacturer.
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