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V
CC
Logic supply voltage - nominally 5V
GROUND
Device Ground. This ground applies for the logic cir-
cuits as well as the power output stages.
RESET
Asynchronous reset for the output stages, the par-
allel latch and the shift register inside the L98SI. This
pin is active low and it must not be left floating. A
power on clear function may be implemented con-
necting this pin to V
CC
with an external resistor and
to ground with an external capacitor.
CE
Chip Enable. Data is transferred from the shift reg-
isters to the outputs on the rising edge of this signal.
The falling edge of this signal sets the shift register
with the output voltage sense bits coming from the
output stages. The output driver for the SO pin is en-
abled when this pin is low.
SO
Serial Output. This pin is the serial output from the
shift register and it is tri-stated when CE is high. A
high for a data bit on this pin indicates that the par-
ticular output is high. A low on this pin for a data bit
indicates that the output is low.
Comparing the serial output bits with the previous
serial input bits the external microcontroller imple-
ments the diagnostic data supplied by the L98SI.
SI
Serial Input. This pin is the serial data input. A high
on this pin will program a particular output to be OFF,
while a low will turn it ON.
SCLK
Serial Clock. This pin clocks the shift register. New
SO data will appear on every rising edge of this pin
and new SI data will be latched on every SCLK’s fall-
ing edge into the shift register.
OUTPUTS 00-07
Power output pins. The input and output bits corres-
ponding to 07 are sent and received first via the SPI
bus and 00 is the last. The outputs are provided with
current limiting and voltage sense functions for fault
indication and protection. The nominal load current
for these outputs is 500mA, but the current limiting
is set to a minimum of 1.05A. The outputs also have
on board clamps set at about 36V for recirculation
of inductive load current.
PIN DESCRIPTION
ELECTRICAL CHARACTERISTICS
(V
CC
= 5V ± 5%. T
j
= – 40 to 125°C ; unless otherwise speciifed)
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
OC
Output Clamping Volt. I
O
= 0.5A, Output Programmed OFF 30 40 V
I
Oleak
Out. Leakage Current V
O
= 24V, Output Progr. OFF 1 mA
R
DSon
On Resistance Output Progr. ON
I
O
= 0.5A
I
O
= 0.8A
I
O
= 1A
With Fault Reset Disabled
0.55
0.55
0.55
1
1
1
Ω
Ω
Ω
I
OL
Out. Self Limiting
Current
Output Progr. ON 1.05 A
t
PHL
Turn-on Delay I
O
= 500mA
No Reactive Load
10
µ
s
t
P
Turn-off Delay I
O
= 500mA
No Reactive Load
10
µ
s
V
OREF
Fault Refer. Voltage Output Progr. OFF
Fault detected if V
O
> V
OREF
1.6 2 V
t
UD
Fault Reset Delay
(after CE L to H
transition)
See fig. 3 75 250
µ
s
V
OFF
Output OFF Voltage Output Pin Floating.cOutput Progr. OFF, 1.0 V
L98SI
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