PSMN6R5-25YLC All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 2 — 31 October 2011 2 of 15
NXP Semiconductors
PSMN6R5-25YLC
N-channel 25 V 6.5 mΩ logic level MOSFET in LFPAK using NextPower technology
2. Pinning information
3. Ordering information
4. Limiting values
Table 2. Pinning information
Pin Symbol Description Simplified outline Graphic symbol
1Ssource
SOT669 (LFPAK; Power-SO8)
2Ssource
3Ssource
4 G gate
mb D mounting base; connected to drain
Table 3. Ordering information
Type number Package
Name Description Version
PSMN6R5-25YLC LFPAK; Power-SO8 plastic single-ended surface-mounted package; 4 leads SOT669
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
V
DS
drain-source voltage 25 °C ≤ T
j
≤ 175 °C - 25 V
V
DGR
drain-gate voltage 25 °C ≤ T
j
≤ 175 °C; R
GS
=20kΩ -25V
V
GS
gate-source voltage -20 20 V
I
D
drain current V
GS
=10V; T
mb
= 25 °C; see Figure 1 -64A
V
GS
=10V; T
mb
= 100 °C; see Figure 1 -45A
I
DM
peak drain current pulsed; t
p
≤ 10 µs; T
mb
=25°C;
see Figure 4
- 256 A
P
tot
total power dissipation T
mb
= 25 °C; see Figure 2 -48W
T
stg
storage temperature -55 175 °C
T
j
junction temperature -55 175 °C
T
sld(M)
peak soldering temperature - 260 °C
V
ESD
electrostatic discharge voltage MM (JEDEC JESD22-A115) 240 - V
Source-drain diode
I
S
source current T
mb
=25°C - 44 A
I
SM
peak source current pulsed; t
p
≤ 10 µs; T
mb
= 25 °C - 256 A
Avalanche ruggedness
E
DS(AL)S
non-repetitive drain-source
avalanche energy
V
GS
=10V; T
j(init)
=25°C; I
D
=64A;
V
sup
≤ 25 V; unclamped; R
GS
=50Ω;
see Figure 3
-18mJ
