LT3570
16
3570fb
Oscillator
The free-running frequency is set through a resistor from
the R
T
pin to ground. The oscillator frequency vs R
T
can
be seen in Figure 4. The oscillator can be synchronized
with an external clock applied to the SYNC pin. When
synchronizing the oscillator, the free running frequency
must be set approximately 10% lower than the desired
synchronized frequency.
LDO Regulator
The LT3570 LDO regulator is capable of delivering up to
10mA of base drive for an external NPN transistor. For
stable operation the total output capacitance can be from
1µF up to 100µF. The regulator has its own independent
supply voltage which allows for the base of the NPN to be
driven from a higher voltage than its collector. This allows
for the NPN regulator to run more effi ciently. The power
Dissipated in the external NPN is equal to:
P
DISS
= (V
COL
– V
OUT3
) • I
LOAD
where V
COL
is the collector voltage of the NPN. The maxi-
mum output voltage is limited to:
V
IN3
– 1.4V and V
COL
– 0.2V or 8V
The short-circuit protection of the NPN regulator is set by
the max output current of the NPN_DRV pin multiplied by
the beta of the NPN.
Thermal Shutdown
An internal temperature monitor will turn off the internal
circuitry and prevent the switches from turning on when
the die temperature reaches approximately 160°C. When
the die temperature has dropped below this value the part
APPLICATIONS INFORMATION
Figure 4. Frequency vs R
T
Resistance
Buck Regulator Minimum On-Time
As the input voltage is increased, the LT3570 is required
to turn on for shorter periods of time. Delays associated
with turning off the power switch determine the minimum
on-time that can be achieved and limit the minimum duty
cycle. Figure 5 shows the minimum duty cycle versus
frequency for the LT3570. When the required on-time has
decreased below the minimum on-time of the LT3570 the
inductor current will increase, exceeding the current limit.
If the current through the inductor exceeds the current limit
of the LT3570, the switch is prevented from turning on for
10µs allowing the inductor current to decrease. The 10µs
off-time limits the average current that can be delivered to
the load. To return to normal switching frequency either
the input voltage or load current must decrease.
RESISTANCE (k)
5
FREQUENCY (kHz)
1250
1750
45
3570 F04
750
250
15
25
35
10
20
30
40
2250
1000
1500
500
2000
FREQUENCY (kHz)
500
0
MINIMUM DUTY CYCLE (%)
5
10
15
20
25
750
1000 1250 1500
3570 F05
1750 2000
Figure 5. Minimum Duty Cycle vs Frequency
LT3570
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will be enabled again going through a soft-start cycle.
Note: Overtemperature protection is intended to protect the
device during momentary overload conditions. Continuous
operation above the specifi ed maximum operating junction
temperature may result in device degradation or failure.
PCB Layout
For proper operation and minimum EMI, care must be
taken during printed circuit board (PCB) layout. Figure 6
shows the high current paths in the step-down regulator
circuit. Note that in the step-down regulator, large switched
currents fl ow in the power switch, the catch diode and the
input capacitor.
Figure 7 shows the high current paths in the step-up
regulator. In the boost regulator, large switched currents
ow through the power switch, the switching diode, and
the output capacitor.
The loop formed by these large switched current com-
ponents should be as small as possible. Place these
components on the same side of the circuit board and
connect them on that layer. Place a local, unbroken ground
plane below these components and tie this ground plane
APPLICATIONS INFORMATION
Figure 6. Buck High Speed Switching Path
Figure 7. Boost High Speed Switching Path
to system ground at one location. Addi tionally, keep
the SW and BOOST nodes as small as possible. This is
implemented in the suggested layout of Figure 8 for the
QFN package which shows the topside metal from the
DC1106A demonstration board.
Thermal Considerations
To deliver the power that the LT3570 is capable of, it
is imperative that a good thermal path be provided to
dissipate the heat generated within the package. This can
be accomplished by taking advantage of the large ther-
mal pad on the underside of the IC. It is recommended
that multiple vias in the printed circuit board be used to
conduct heat away from the IC and into a copper plane
with as much area as possible.
Related Linear Technology Publications
Application notes 19, 35, 44, 76 and 88 contain more
detailed descriptions and design information for buck
regulators and other switching regulators. The LT1375 data
sheet has a more extensive discussion of output ripple,
loop compensation, and stability testing.
Figure 8. Suggested Layout
3570 F06
L2
D1 C
OUT
HIGH
FREQUENCY
CIRCULATING
PATH
C
IN
LOAD
LT3570
3750 F07
L2
LT3570
D1
C
OUT
C
IN
HIGH
FREQUENCY
SWITCHING
PATH
LOAD
LT3570
18
3570fb
TYPICAL APPLICATIONS
DSL Modem
“Dying Gasp” System
V
IN1
SHDN1
SHDN2
SHDN3
SHDN1
SHDN2
SHDN3
SW1
FB1
C8
100nF
C7
1nF
C5
10nF
C2
22µF
C3
2.2µF
V
OUT3
3.3V
500mA
R3
118k
V
OUT2
5V
R8
25k
R1
105k
V
OUT1
8V
250mA
V
IN
8V TO 28V
R7
25k
R2
11.5k
R4
22.1k
R5
34.0k
R6
10.7k
3570 TA02
R9
20.0k
C9
10µF
C1
10µF
C6
1nF
10nF
L2
10µH
L1
4.7µH
D2
D3
D1
BOOST
SW2
FB2
SS2
NPN_DRV
FB3
V
C2
SS1
V
C1
V
IN2
V
IN3
BIAS
R
T
SYNC
LT3570
GND
Q1
V
IN1
SHDN1
SHDN2
SHDN3
SW1
FB1
C8
100nF
C7
1nF
C5
10nF
C2
22µF
C3
2.2µF
V
OUT3
2.5V
200mA
R3
205k
V
OUT2
3.3V
200mA
R8
51k
R1
442k
V
OUT1
34V
V
IN
12V
R7
20k
R2
10.5k
R4
64.9k
R5
137k
R6
64.9k
3570 TA03
R9
44.2k
C9
10µF
C10
0.1µF
C1
10µF
C6
1nF
C4
10nF
L2
22µH
L1
47µH
D2
D3
D1
BOOST
SW2
FB2
SS2
NPN_DRV
FB3
V
C2
SS1
V
C1
V
IN2
V
IN3
BIAS
R
T
SYNC
LT3570
GND
Q1

LT3570EUF#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators 1.5A Buck Conv, 1.5A Boost Conv & LDO Cn
Lifecycle:
New from this manufacturer.
Delivery:
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