Operation STM1810/1811/1812/1813/1815/1816/1817/1818
10/25 Doc ID11464 Rev 8
2.5 Valid RST output down to V
CC
= 0 V
When V
CC
falls below 1 V, the RST output no longer sinks current, but becomes an open
circuit. In most systems this is not a problem, as most MCUs do not operate below 1 V.
However, in applications where RST
output must be valid down to 0 V, a pull-down resistor
may be added to hold the RST
output low (see Figure 11). This resistor must be large
enough to not load the RST
output, and still be small enough to pull the output to ground.
A 100 kΩ
resistor is recommended.
Note: The same situation applies for the active-high RST of the STM1810/1812. A 100 k
Ω
pull-up
resistor to V
CC
should be used if RST must remain valid for V
CC
< 1.0 V.
Figure 7. Reset timing diagram
1. RST for STM1812 and STM1817.
Figure 8. Push-button manual reset with MR detect (STM1813/1818)
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2ESET
MONITOR
