IDT
®
Programmable Timing Control Hub
TM
for Next Gen P4
TM
Processor 0743H—03/15/13
ICS932S208
Programmable Timing Control Hub
TM
for Next Gen P4
TM
Processor
13
I
2
C Table: Output Control Register
Pin # Name Control Function T
e0 1 PWD
Bit 7
PCI_Stop#
PCI_Stop# Control
0:all stoppable PCI
are stopped
RW Enable Disable 1
Bit 6
PCICLK6 Output Control RW Disable Enable 1
Bit 5
PCICLK5 Out
ut Control RW Disable Enable 1
Bit 4
PCICLK4 Out
ut Control RW Disable Enable 1
Bit 3
PCICLK3 Out
ut Control RW Disable Enable 1
Bit 2
PCICLK2 Output Control RW Disable Enable 1
Bit 1
PCICLK1 Output Control RW Disable Enable 1
Bit 0
PCICLK0 Output Control RW Disable Enable 1
I
2
C Table: Output Control Register
Pin # Name Control Function T
e0 1 PWD
Bit 7
48MHz_USB
2x output drive
0=2x drive RW 2x drive normal 1
Bit 6
48MHz_USB Output Control RW Disable Enable 1
Bit 5
PCIF2 RW FREE-RUN STOPPABLE 0
Bit 4
PCIF1 RW FREE-RUN STOPPABLE 0
Bit 3
PCIF0 RW FREE-RUN STOPPABLE 0
Bit 2
PCICLK_F2 Output Control RW Disable Enable 1
Bit 1
PCICLK_F1 Output Control RW Disable Enable 1
Bit 0
PCICLK_F0 Output Control RW Disable Enable 1
I
2
C Table: Output Control Register
Pin # Name Control Function T
e0 1 PWD
Bit 7
48MHZ_DOT Output Control RW Disable Enable 1
Bit 6
CPUT3/CPUC3 Output Control RW Disable Enable 1
Bit 5
3V66_4/VCH
Select
Output Select RW 3V66 VCH 0
Bit 4
3V66_4/VCH Output Control RW Disable Enable 1
Bit 3
3V66_3 Output Control RW Disable Enable 1
Bit 2
3V66_2 Output Control RW Disable Enable 1
Bit 1
3V66_1 Output Control RW Disable Enable 1
Bit 0
3V66_0 Output Control RW Disable Enable 1
7
50/49
29
29
27
23
22
18
15
14
26
B
te 5
32
9
13
12
8
B
te 3
7,8,9,12,13,14,15,
18,19,20,37,38,
20
19
7
9
8
PCI FREE-RUN
NING CONTROL
B
te 4
31
31