RT8243A/B/C
19
DS8243A/B/C-07 November 2014 www.richtek.com
©
Copyright 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.
Figure 5. Charge pump circuit connected to SECFB
MOSFET Gate Driver (UGATEx, LGATEx)
The high side driver is designed to drive high current, low
R
DS(ON)
N-MOSFET(s). When configured as a floating driver,
5V bias voltage is delivered from the LDO5 supply. The
average drive current is also calculated by the gate charge
at V
GS
= 5V times switching frequency. The instantaneous
drive current is supplied by the flying capacitor between
BOOTx and PHASEx pins. A dead time to prevent shoot
through is internally generated from high side MOSFET
off to low side MOSFET on and low side MOSFET off to
high side MOSFET on.
The low side driver is designed to drive high current low
R
DS(ON)
N-MOSFET(s). The internal pull down transistor
that drives LGATEx low is robust, with a 1.5Ω typical on-
resistance. A 5V bias voltage is delivered from the LDO5
supply. The instantaneous drive current is supplied by an
input capacitor connected between LDO5 and GND.
For high current applications, some combinations of high
and low side MOSFETs may cause excessive gate drain
coupling, which leads to efficiency killing, EMI producing,
shoot through currents. This is often remedied by adding
a resistor in series with BOOTx, which increases the turn
on time of the high side MOSFET without degrading the
turn-off time. See Figure 6.
Figure 6. Increasing the UGATEx Rise Time
Soft-Start
The RT8243A/B/C provides an internal soft-start function
to prevent large inrush current and output voltage overshoot
when the converter starts up. The soft-start (SS)
automatically begins once the chip is enabled. During soft-
start, the internal current limit circuit gradually ramps up
the inductor current from zero. The maximum current limit
value is set externally as described in previous section.
The soft-start time is determined by the current limit level
and output capacitor value. The current limit threshold ramp
up time is typically 2ms from zero to 200mV after
ENTRIPx is enabled. A unique PWM duty limit control
that prevents output over voltage during soft-start period
is designed specifically for FBx floating.
UVLO Protection
The RT8243A/B/C has LDO5 under voltage lock out
protection (UVLO). When the LDO5 voltage is lower than
4.05V (typ.) and the LDO3 voltage is lower than 2.2V (typ.),
both switch power supplies are shut off. This is a non-
latch protection.
Power Good Output (PGOOD)
PGOOD is an open-drain type output and requires a pull
up resistor. PGOOD is actively held low in soft-start,
standby, and shutdown. It is released when both output
voltages are above 90% of the nominal regulation point
for RT8243A. For RT8243B/C, besides requiring both
output voltages to be above 90% of nominal regulation
point, the SECFB threshold must also be above 50% of
nominal regulation point in order for PGOOD to be released.
The PGOOD signal goes low if either output turns off or is
10% below its nominal regulation point.
Output Over Voltage Protection (OVP)
The output voltage can be continuously monitored for over
voltage. If the output voltage exceeds 12% of its set voltage
threshold, the over voltage protection is triggered and the
LGATEx low side gate drivers are forced high. This
activates the low side MOSFET switch, which rapidly
discharges the output capacitor and pulls the input voltage
downward.
SECFB
LGATE1
VOUT1
D1 D2 D3
C3
D4
C1
C2
C
F
R
CP1
C4
R
CP2
Charge Pump
BOOTx
R
BOOT
UGATEx
V
IN
PHASEx
The robustness of the charge pump can be increased by
reducing the charge pump decoupling capacitor and placing
a small ceramic capacitor, C
F
(47pF to 220pF), in parallel
with the upper leg of the SECFB resistor feedback network,
R
CP1
, as shown below in Figure 5.