RT8243A/B/C
4
DS8243A/B/C-07 November 2014www.richtek.com
©
Copyright 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.
Figure 2. RT8243B/C NB Main Supply Typical Application Circuit
RT8243B/C
PHASE1
LGATE1
BOOT1
UGATE1
VIN
11
16
19
17
18
PHASE2
LGATE2
BOOT2
UGATE2
FB2
V
I
N
1
0
µ
F
8
9
7
10
5
C
6
R
1
C
2
0
.
1
µ
F
5
.
5
V
t
o
2
5
V
21 (Exposed Pad)
GND
N3
L
2
C
7
C
8
3
.
3
V
0
.
1
µ
F
R
5
N4
R
6
6
.
5
k
+
N1
L
1
C
4
C
3
5
V
0
.
1
µ
F
R
2
N2
R
3
1
5
k
+
R
4
1
0
k
R
7
1
0
k
FB1
1
BYP1
20
1
0
µ
F
C
1
ENLDO
12
R
8
1
0
0
k
R
9
1
0
0
k
ENTRIP2
4
ENTRIP1
2
Off
On
LDO3
15
C
9
4
.
7
µ
F
LDO5
14
PGOOD
6
R
1
0
1
0
0
k
C
1
0
5
V
A
l
w
a
y
s
O
n
TON
3
R
TON
C
1
1
0
.
1
µ
F
C
1
2
0
.
1
µ
F
SECFB
13
R
1
1
2
0
0
k
R
1
2
3
9
k
V
CP
C
1
3
0
.
1
µ
F
C
1
4
0
.
1
µ
F
C
5
O
p
t
i
o
n
a
l
C
1
5
3
.
3
V
A
l
w
a
y
s
O
n
V
O
U
T
1
V
O
U
T
2
4
.
7
µ
F
RT8243A/B/C
5
DS8243A/B/C-07 November 2014 www.richtek.com
©
Copyright 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.
Pin No. Pin Name Pin Function
1 FB1
SMPS1 Feedback Input. Connect FB1 to a resistive voltage divider from SMPS1
output to GND for adjustable output from 2V to 5.5V.
2 ENTRIP1
Channel 1 Enable and Current Limit Setting Input. Connect resistor to GND to set
the threshold for Channel 1 synchronous R
DS(ON)
sense. The GND-PHASE1
current limit threshold is 1/10th the voltage seen at ENTRIP1 over a 0.5V to 3V
range. There is an internal 10A current source from LDO5 to ENTRIP1. Leave
ENTRIP1 floating or drive it above 4.5V to shut down channel 1.
3 TON ON-Time/Frequency Adjustment Input. Connect to GND with 56k to 100k.
4 ENTRIP2
Channel 2 Enable and Current Limit Setting Input. Connect resistor to GND to set
the threshold for Channel 2 synchronous R
DS(ON)
sense. The GND-PHASE2
current limit threshold is 1/10th the voltage seen at ENTRIP2 over a 0.5V to 3V
range. There is an internal 10A current source from LDO5 to ENTRIP2. Leave
ENTRIP2 floating or drive it above 4.5V to shut down channel 2.
5 FB2
SMPS2 Feedback Input. Connect FB2 to a resistive voltage divider from SMPS2
output to GND for adjustable output from 2V to 5.5V.
6 PGOOD
Power Good Output for Channel 1 and Channel 2 (RT8243A).
Power Good Output for Channel 1, Channel 2 and SECFB (RT8243B/C).
7 BOOT2
Boost Flying Capacitor Connection for SMPS2. Connect to an external capacitor
according to the typical application circuits.
8 UGATE2
Upper Gate Driver Output for SMPS2. UGATE2 swings between PHASE2 and
BOOT2.
9 PHASE2
Switch Node for SMPS2. PHASE2 is the internal lower supply rail for the UGATE2
high side gate driver. PHASE2 is also the current sense input for the SMPS2.
10 LGATE2 Lower Gate Drive Output for SMSP2. LGATE2 swings between GND and LDO5.
11 VIN Supply Input for LDO5.
12 ENLDO
Master Enable Input. LDO5/LDO3 is enabled if it is within logic high level and
disabled if it is less than the logic low level. Leave ENLDO floating to default
enable LDO5/LDO3.
13
ENM
(RT8243A)
Mode Selection with Enable Input. Pull up to LDO5 (Ultrasonic mode) or LDO3
(DEM) to turn on both switch Channels. Short to GND for shutdown.
SECFB
(RT8243B/C)
Change Pump Feedback Pin. The SECFB is used to monitor the optional external
charge pump. Connect a resistive divider from the change pump output to GND to
detect the output. If SECFB drops below its feedback threshold, an ultrasonic
pulse occurs to refresh the charge pump driven by LGATE1 or LGATE2.
If SECFB drops below its UV threshold, the switcher channels stop working and
enter into discharge-mode. Pull up to LDO5 or LDO3 to disable SECFB UVP
function.
14 LDO5
5V Linear Regulator Output. LDO5 is the supply voltage for the low side MOSFET
driver and also the analog supply voltage for the device. Bypass a minimum 4.7F
ceramic capacitor to GND
15 LDO3
3.3V Linear Regulator Output. Bypass a minimum 4.7F ceramic capacitor to
GND.
Functional Pin Description
RT8243A/B/C
6
DS8243A/B/C-07 November 2014www.richtek.com
©
Copyright 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.
Function Block Diagram
Pin No. Pin Name Pin Function
16 LGATE1
Lower Gate Driver Output for SMPS1. LGATE1 swings between GND and
LDO5.
17 PHASE1
Switch Node SMPS1. PHASE1 is the internal lower supply rail for the UGATE1
high side gate driver. PHASE1 is also the current sense input for the SMPS1.
18 UGATE1
Upper Gate Driver Output for SMPS1. UGATE1 swings between PHASE1 and
BOOT 1.
19 BOOT1
Boost Flying Capacitor Connection for SMPS1. Connect to an external
capacitor according to the typical application circuits.
20 BYP1 Switch Over Source Voltage Input for LDO5.
21 (Exposed Pad) GND
Analog Ground and Power Ground. The exposed pad must be soldered to a
large PCB and connected to GND for maximum power dissipation.
ENM (RT8243A)
SECFB (RT8243B/C)
SMPS2
PWM
Buck
Controller
BOOT2
UGATE2
PHASE2
LGATE2
GND
LDO5
FB2
ENTRIP2
PGOOD
SMPS1
PWM
Buck
Controller
BOOT1
UGATE1
PHASE1
LGATE1
LDO5
FB1
ENTRIP1
LDO5
REF
Switch Over Threshold
VIN
LDO5
On Time
TON
LDO3
LDO3
BYP1
Power On
Sequence
Clear Fault Latch
ENLDO
+
-
LDO5
10µA
LDO5
10µA

RT8243BZQW

Mfr. #:
Manufacturer:
Description:
IC REG CTRLR NOTEBK 2OUT 20WQFN
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet