PI6C180VE Datasheet PI6C180VE, PI6C180VEX | P1-P3

PS8141E 07/19/04

Features

• High-speed, to 100 MHz

• Low-noise non-inverting 1-18 buffer

• Supports up to four SDRAM DIMMs

• Low skew (< 250ps) between any two output clocks

• I

C Serial Conguration interface

• Multiple V

, V

pins for noise reduction

• 3.3V power supply voltage

• Separate Hi-Z pin for testing

• Packaging:

- 48-pin SSOP (V)

Block Diagram

Description

The PI6C180, a high-speed low-noise 1-18 non-inverting buffer

designed for SDRAM clock buffer applications operates up to

100 MHz.

At power up all SDRAM output are enabled and active. The I

Serial control may be used to individually activate/deactivate any

of the 18 output drivers.

The output enable (OE) pin may be pulled low to put all outputs

in a Hi-Z state.

Note:

Purchase of I

C components from Pericom conveys a license to

use them in an I

C system as dened by Philips.

Pin Conguration

PI6C180

Precision 1-18 Clock Buffer

NC 1

NC 2

DD0

SDRAM0 4

SDRAM1 5

SS0

DD1

SDRAM2 8

SDRAM3 9

SS1

BUF_IN 11

DD2

SDRAM4 13

SDRAM5 14

SS2

DD3

SDRAM6 17

SDRAM7 18

SS3

DD4

SDRAM16 21

SS4

DDIIC

SDATA 24

DD9

SDRAM15

SDRAM14

SS9

DD8

SDRAM13

SDRAM12

SS8

DD7

SDRAM11

SDRAM10

SS7

DD6

SDRAM9

SDRAM8

SS6

DD5

SDRAM17

SS5

SSIIC

SCLOCK

SDRAM17

SDRAM2

SDRAM1

SDRAM0

BUF_IN

SDATA

SCLOCK

SDRAM3

I/O

PS8141E 07/19/04

PI6C180

Precision 1-18 Clock Buffer

Pin Description

Pin Symbol Type Qty Description

4, 5, 8, 9 SDRAM[0-3] O 4 SDRAM Byte 0 clock output

13, 14, 17, 18 SDRAM[4-7] O 4 SDRAM Byte 1 clock output

31, 32, 35, 36 SDRAM[8-11] O 4 SDRAM Byte 2 clock output

40, 41, 44, 45 SDRAM[12-15] O 4 SDRAM Byte 3 clock output

21, 28 SDRAM[16-17] O 4 SDRAM clock outputs usable for feedback

11 Buf_IN I 1 Input for 1-18 buffer

38 OE I 1 Hi-Z all outputs when held LOW. Has a >100kΩ internal pull-up resistor

24 S

DATA

I/O 1 Data pin for I

C circuitry. Has a >100kΩ internal pull-up resistor

25 S

CLOCK

I/O 1 Clock pin for I

C circuitry. Has a >100kΩ internal pull-ip resistor

3, 7, 12, 16,

20, 29, 33, 37,

42, 46

DD[0-9]

Power 10 3.3V power supply for SDRAM buffers

6, 10, 15, 19,

22, 27, 30, 34,

39, 43

SS[0-9]

Ground 10 Ground for SDRAM buffers

23 V

DDIIC

Power 1 3.3V power supply for I

C circuitry

26 V

SSIIC

Ground Ground for I

C circuitry

1, 2, 47, 48 NC Reserved 4 Reserved for future modications. No connects

OE Functionality

OE SDRAM[0-17] Notes

0 Hi-Z 1

1 BUF_IN 2

C Address Assignment

A6 A5 A4 A3 A2 A1 A0 R/W

1 1 0 1 0 0 1 0

Notes:

1. Used for test purposes only

2. Buffers are non-inverting

Serial Conguration Map

Byte0: SDRAM Active/Inactive Register

(1 = enable, 0 = disable)

Bit Pin Description

7 18 SDRAM7 (Active/Inactive)

6 17 SDRAM6 (Active/Inactive)

5 14 SDRAM5 (Active/Inactive)

4 13 SDRAM4 (Active/Inactive)

3 9 SDRAM3 (Active/Inactive)

2 8 SDRAM2 (Active/Inactive)

1 5 SDRAM1 (Active/Inactive)

0 4 SDRAM0 (Active/Inactive)

Note:

1. Inactive means outputs are held LOW and are disabled from

switching.

PS8141E 07/19/04

PI6C180

Precision 1-18 Clock Buffer

Each data transfer is initiated with a start condition and ended with

a stop condition. The rst byte after a start condition is always a

7-bit address byte followed by a read/write bit. (HIGH = read from

addressed device, LOW= write to addressed device). If the device’s

own address is detected, PI6C180 generates an acknowledge by

pulling SDATA line LOW during ninth clock pulse, then accepts

the following data bytes until another start or stop condition is

detected.

Following acknowledgement of the address byte (D2), two more

bytes must be sent:

1. “Command Code” byte, and

2. “Byte Count” byte.

Although the data bits on these two bytes are “don’t care,” they

must be sent and acknowledged.

Byte1: SDRAM Active/Inactive Register

(1 = enable, 0 = disable)

Bit Pin Description

7 45 SDRAM15 (Active/Inactive)

6 44 SDRAM14 (Active/Inactive)

5 41 SDRAM13 (Active/Inactive)

4 40 SDRAM12 (Active/Inactive)

3 36 SDRAM11 (Active/Inactive)

2 35 SDRAM10 (Active/Inactive)

1 32 SDRAM9 (Active/Inactive)

0 31 SDRAM8 (Active/Inactive)

Byte2: Optional Register for Possible Future Requirements

(1 = enable, 0 = disable)

Bit Pin Description

7 28 SDRAM17 (Active/Inactive)

6 21 SDRAM16 (Active/Inactive)

5 (Reserved)

4 (Reserved)

3 (Reserved)

2 (Reserved)

1 (Reserved)

0 (Reserved)

Storage Temperature........................................–65°C to +150°C

Ambient Temperature with Power Applied.........–0°C to +70°C

3.3V Supply Voltage to Ground Potential ..........–0.5V to +4.6V

DC Input Voltage ................................................–0.5V to +4.6V

Note:

Stresses greater than those listed under MAXIMUM RAT-

INGS may cause permanent damage to the device. This is a

stress rating only and functional operation of the device at

these or any other conditions above those indicated in the op-

erational sections of this specication is not implied. Exposure to

absolute maximum rating conditions for extended periods may affect

reliability.

Supply Current (V

= +3.465V, C

LOAD

= Max.)

Symbol Parameter Test Condidtion Min. Typ. Max. Units

Supply Current

BUF_IN = 0 MHz 2

mAI

BUF_IN = 66.66 MHz 230

BUF_IN = 100.00 MHz 360

2-Wire I

C Control

The I

C interface permits individual enable/disable of each clock

output and test mode enable.

The PI6C180 is a slave receiver device. It can not be read back.

Sub addressing is not supported. All preceding bytes must be sent

in order to change one of the control bytes.

Every bite put on the SDATA line must be 8-bits long (MSB rst), fol-

lowed by an acknowledge bit generated by the receiving device.

During normal data transfers SDATA changes only when SCLOCK

is LOW. Exceptions: A HIGH to LOW transition on SDATA while

SCLOCK is HIGH indicates a “start” condition. A LOW to HIGH

transition on SDATAwhile SCLOCK is HIGH is a “stop” condition

and indicates the end of a data transfer cycle.

Maximum Ratings

(Above which the useful life may be impaired. For user guidelines, not tested.)

P1-P3 P4-P6 P7-P7

PI6C180VE

Mfr. #:

Buy PI6C180VE

Manufacturer:

Diodes Incorporated

Description:

Clock Buffer Precision 1 18 Clock Buffer

Lifecycle:

New from this manufacturer.

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PI6C180VE

PI6C180VE

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