LTC4101
23
4101fa
APPLICATIONS INFORMATION
Table 10. Recommended Inductor Values
Inductance
I
MAX
(A)
2V
IN
Range (V) 1 3* and 4
≤ 7.5 16µH ± 20% 8µH ± 20% 4µH ± 20%
≤ 9.0 20µH ± 20% 10µH ± 20% 5µH ± 20%
≤ 12.0 24µH ± 20% 12µH ± 20% 6µH ± 20%
≤ 15.0 26µH ± 20% 13µH ± 20% 6.5µH ± 20%
≤ 28.0 30µH ± 20% 15µH ± 20% 7.5µH ± 20%
R
SENSE
0.1Ω 0.05Ω 0.025Ω
* 3 Amp uses the same R
SENSE
that 4 amps uses. Thus the inductance
can be the same.
Choose and inductor who’s inductance value is equal to
or greater than the value shown. Values assume:
1. –32% RSS result from –20% inductance tolerance
and a –25% inductance loss at I
MAX
.
2. Inductor ripple current ratio of 0.51 of I
OUT
across
R
SENSE
.
3. V
OUT
is at 4.2V
Charger Switching Power MOSFET
and Diode Selection
Two external power MOSFETs must be selected for use
with the charger: a P-channel MOSFET for the top (main)
switch and an N-channel MOSFET for the bottom (syn-
chronous) switch.
The peak-to-peak gate drive levels are set internally. This
voltage is typically 6V. Consequently, logic-level threshold
MOSFETs must be used. Pay close attention to the BV
DSS
specifi cation for the MOSFETs as well; many of the logic
level MOSFETs are limited to 30V or less.
Selection criteria for the power MOSFETs include the “ON”
resistance R
DS(ON)
, total gate capacitance Q
G
, reverse
transfer capacitance C
RSS
, input voltage and maximum
output current. The charger is operating in continuous
mode so the duty cycles for the top and bottom MOSFETs
are given by:
Main Switch Duty Cycle = V
OUT
/V
IN
Synchronous Switch Duty Cycle = (V
IN
– V
OUT
)/V
IN
.
The MOSFET power dissipations at maximum output
current are given by:
PMAIN = V
OUT
/V
IN
(I
MAX
)
2
(1 + δΔT)R
DS(ON)
+ k(V
IN
)
2
(I
MAX
)(C
RSS
)(f
OSC
)
PSYNC = (V
IN
– V
OUT
)/V
IN
(I
MAX
)
2
(1 + δΔT)R
DS(ON)
Where δ∆T is the temperature dependency of R
DS(ON)
and
k is a constant inversely related to the gate drive current.
Both MOSFETs have I
2
R losses while the PMAIN equation
includes an additional term for transition losses, which
are highest at high input voltages. For V
IN
< 20V the high
current effi ciency generally improves with larger MOSFETs,
while for V
IN
> 20V the transition losses rapidly increase to
the point that the use of a higher R
DS(ON)
device with lower
C
RSS
actually provides higher effi ciency. The synchronous
MOSFET losses are greatest at high input voltage or during
a short circuit when the duty cycle in this switch in nearly
100%. The term (1 + δΔT) is generally given for a MOSFET
in the form of a normalized R
DS(ON)
vs temperature curve,
but δ = 0.005/°C can be used as an approximation for low
voltage MOSFETs. C
RSS
= Q
GD
/ΔV
DS
is usually specifi ed
in the MOSFET characteristics. The constant k = 2 can be
used to estimate the contributions of the two terms in the
main switch dissipation equation.
If the charger is to operate in low dropout mode or with
a high duty cycle less than 50%, then the bottomside
N-Channel effi ciency generally improves with a larger
MOSFET. Using asymmetrical MOSFETs may achieve cost
savings or effi ciency gains.
Both of the LTC4101 MOSFET drivers are optimized to
take advantage of MOSFETs Q
G
values of less than 22nC
and a TD-off delay specifi cation of around 60ns or less.
Larger FETs may work, but you must qualify them and
monitor LTC4101 temperature rise.
Using excessively large MOSFETs relative to the I
MAX
charge current they are working with will actually reduce
effi ciency at lighter current levels with very limited gain
at high currents. A good place to start looking for a suit-
able MOSFET in a data sheet is to look for a part with
an I
D
rating a little over 2 times the I
MAX
charge current
rating. For the LTC4101, the P-channel FET can typically
be scaled down a bit to take advantage of the lower duty
cycle limits. However make sure you never exceed the P
D
rating of the device.
