PHD45N03LTA,118 Datasheet PHD45N03LTA,118, PHP45N03LTA,127 | P4-P6

Philips Semiconductors

PHP/PHB/PHD45N03LTA

TrenchMOS™ logic level FET

Product data Rev. 03 — 2 October 2002 4 of 14

9397 750 10194

7. Thermal characteristics

7.1 Transient thermal impedance

Table 4: Thermal characteristics

Symbol Parameter Conditions Min Typ Max Unit

R

th(j-mb)

thermal resistance from junction to mounting base Figure 4 - - 2.3 K/W

R

th(j-a)

thermal resistance from junction to ambient

SOT78 vertical in still air - 60 - K/W

SOT428 SOT428 minimum footprint;

mounted on a PCB

- 75 - K/W

SOT404 and SOT428 SOT404 minimum footprint;

mounted on a PCB

- 50 - K/W

Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration.

03af57

10

-2

10

-1

1

10

-5

10

-4

10

-3

10

-2

10

-1

1

t

p

(s)

Z

th(j-mb)

(K/W)

single pulse

δ = 0.5

0.2

0.1

0.05

0.02

t

p

t

p

T

P

t

T

δ =

Philips Semiconductors

PHP/PHB/PHD45N03LTA

TrenchMOS™ logic level FET

Product data Rev. 03 — 2 October 2002 5 of 14

9397 750 10194

8. Characteristics

Table 5: Characteristics

T

j

=25

°

C unless otherwise speciﬁed

Symbol Parameter Conditions Min Typ Max Unit

Static characteristics

V

(BR)DSS

drain-source breakdown voltage I

D

= 0.25 mA; V

GS

=0V

T

j

=25°C 25--V

T

j

= −55 °C 22--V

V

GS(th)

gate-source threshold voltage I

D

= 1 mA; V

DS

=V

GS

; Figure 9

T

j

=25°C 1 1.5 2 V

T

j

= 175 °C 0.5 - - V

T

j

= −55 °C - - 2.3 V

I

DSS

drain-source leakage current V

DS

=25V; V

GS

=0V

T

j

=25°C - 0.05 10 µA

T

j

= 175 °C - - 500 µA

I

GSS

gate-source leakage current V

GS

= ±5 V; V

DS

= 0 V - 10 100 nA

R

DSon

drain-source on-state resistance V

GS

=5V; I

D

=25A;Figure 7 and 8

T

j

=25°C - 17.5 24 mΩ

T

j

= 175 °C - 30 40.8 mΩ

V

GS

=10V; I

D

=25A;Figure 7 and 8

T

j

=25°C - 13 21 mΩ

V

GS

= 3.5 V; I

D

= 5.2 A; Figure 7 and 8

T

j

=25°C - 22 40 mΩ

Dynamic characteristics

Q

g(tot)

total gate charge I

D

= 40 A; V

DD

=24V; V

GS

=5V;Figure 13 -19-nC

Q

gs

gate-source charge - 5 - nC

Q

gd

gate-drain (Miller) charge - 8 11 nC

C

iss

input capacitance V

GS

=0V; V

DS

= 25 V; f = 1 MHz; Figure 11 - 700 - pF

C

oss

output capacitance - 290 - pF

C

rss

reverse transfer capacitance - 200 - pF

t

d(on)

turn-on delay time V

DD

=15V; I

D

= 15 A; V

GS

=10V;

R

G

=6Ω; resistive load

- 1020ns

t

r

rise time - 6090ns

t

d(off)

turn-off delay time - 35 60 ns

t

f

fall time - 4060ns

Source-drain diode

V

SD

source-drain (diode forward) voltage I

S

= 25 A; V

GS

=0V;Figure 12 - 0.95 1.2 V

Philips Semiconductors

PHP/PHB/PHD45N03LTA

TrenchMOS™ logic level FET

Product data Rev. 03 — 2 October 2002 6 of 14

9397 750 10194

T

j

=25°CT

j

=25°C and 175 °C; V

DS

>I

D

x R

DSON

Fig 5. Output characteristics: drain current as a

function of drain-source voltage; typical values.

Fig 6. Transfer characteristics: drain current as a

function of gate-source voltage; typical values.

T

j

=25°C

Fig 7. Drain-source on-state resistance as a function

of drain current; typical values.

Fig 8. Normalized drain-source on-state resistance

factor as a function of junction temperature.

03af59

0

15

30

45

0 0.5 1 1.5 2

V

DS

(V)

I

D

(A)

2.5 V

5 V

T

j

= 25

°

C

V

GS

= 2 V

10 V 4 V

3.5 V

3 V

6 V

03af61

0

15

30

45

012345

V

GS

(V)

I

D

(A)

V

DS

> I

D

x R

DSon

T

j

= 25

°

C

175

°

C

03af60

0

0.01

0.02

0.03

0153045

I

D

(A)

R

DSon

(Ω)

3.5 V

T

j

= 25

°

C

5 V

10 V

6 V

V

GS

= 4 V

03ad57

0

0.5

1

1.5

2

-60 0 60 120 180

T

j

(

°

C)

a

R

DSon

R

DSon 25 C

°

()

----------------------------

=

PHD45N03LTA,118

PHD45N03LTA,118

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