RT8206A/B
23
DS8206A/B-06 August 2011 www.richtek.com
SW
ESR
OUT
f
1
f =
2 ESR C 4
π
≤
×× ×
Do not put high-value ceramic capacitors directly across
the outputs without taking precautions to ensure stability.
Large ceramic capacitors can have a high ESR zero
frequency and cause erratic, unstable operation. However,
it is easy to add enough series resistance by placing the
capacitors a couple of inches downstream from the
inductor and connecting VOUTx or the FBx divider close
to the inductor.
There are two related but distinct ways including double-
pulsing and feedback loop instability in the unstable
operation.
Double-pulsing occurs due to noise on the output or
because the ESR is too low that there is not enough
voltage ramp in the output voltage signal. This “fools”
the error comparator into triggering a new cycle
immediately after the 300ns minimum off-time period has
expired. Double-pulsing is more annoying than harmful,
resulting in nothing worse than increased output ripple.
However, it may indicate the possible presence of loop
instability, which is caused by insufficient ESR.
Loop instability can result in oscillations at the output
after line or load perturbations that can trip the over voltage
protection latch or cause the output voltage to fall below
the tolerance limit.
The easiest method for checking stability is to apply a
very fast zero-to-max load transient and carefully observe
the output voltage ripple envelope for overshoot and ringing.
It helps to simultaneously monitor the inductor current
with an AC current probe. Do not allow more than one
cycle of ringing after the initial step response under or
overshoot.
Thermal Considerations
For continuous operation, do not exceed absolute
maximum operation junction temperature. The maximum
power dissipation depends on the thermal resistance of
IC package, PCB layout, the rate of surroundings airflow
and temperature difference between junction to ambient.
The maximum power dissipation can be calculated by
following formula :
P
D(MAX)
= ( T
J(MAX)
- T
A
) / θ
JA
Where T
J(MAX)
is the maximum operation junction
temperature, T
A
is the ambient temperature and the θ
JA
is
the junction to ambient thermal resistance.
For recommended operating conditions specification of
RT8206, the maximum junction temperature is 125°C. The
junction to ambient thermal resistance θ
JA
is layout
dependent. For WQFN-32L 5x5 package, the thermal
resistance θ
JA
is 36°C/W on the standard JEDEC 51-7
four layers thermal test board. The maximum power
dissipation at T
A
= 25°C can be calculated by following
formula :
P
D(MAX)
= (125°C − 25°C) / (36°C/W) = 2.778W for
WQFN-32L 5x5 package
The maximum power dissipation depends on operating
ambient temperature for fixed T
J(MAX)
and thermal
resistance θ
JA
. For RT8206A/B package, the Figure 7 of
derating curves allows the designer to see the effect of
rising ambient temperature on the maximum power
allowed.
Output Capacitor Selection
The output filter capacitor must have low enough Equivalent
Series Resistance (ESR) to meet output ripple and load
transient requirements, yet have high enough ESR to
satisfy stability requirements. The output capacitance
must also be high enough to absorb the inductor energy
while transiting from full load to no load conditions without
tripping the overvoltage fault latch.
Although Mach Response
TM
DRV
TM
dual ramp valley mode
provides many advantages such as ease-of-use, minimum
external component configuration, and extremely short
response time, due to not employing an error amplifier in
the loop, a sufficient feedback signal needs to be provided
by an external circuit to reduce the jitter level. The required
signal level is approximately 15mV at the comparing point.
This generates V
RIPPLE
= (V
OUT
/ 2) x 15mV at the output
node. The output capacitor ESR should meet this
requirement.
Output Capacitor Stability
Stability is determined by the value of the ESR zero relative
to the switching frequency. The point of instability is given
by the following equation :
