IR1155S
www.irf.com 13
© 2011 International Rectifier
IR1155 Pin Description
Pin COM: This is ground potential pin of the IC.
All internal devices are referenced to this point. A
star-connection point, very close to this pin, is
recommended in PCB lay-out in order to
reference the return traces of the various control
loops to the COM potential of the IC.
Pin COMP: External circuitry from this pin to
ground compensates the system voltage loop and
programs the soft start time. The COMP pin is
essentially the output of the voltage error
amplifier. VCOMP is actively discharged using an
internal switch & resistance inside the IC
whenever the IC is pushed into Stand-by mode
(Open Loop Condition) or UVLO/Sleep mode. The
IC is designed not to start-up (from UVLO, Sleep
or Stand-by modes) when there is a pre-bias on
VCOMP pin that is greater than V
COMP,START
. The
VCOMP-COM loop represents a very important
control loop to the IC and hence a dedicated PCB
trace loop is recommended for layout (star-
connection to GND potential) for noise free, stable
operation.
Pin ISNS: ISNS pin is the inverting input to the
current sense amplifier of the IC. The voltage at
this pin is the negative voltage drop sensed
across the system current sense resistor and thus
represents the inductor current sense signal to the
IC for determining gate drive duty cycle. ISNS pin
is also the inverting input to the cycle-by-cycle
peak current limit comparator. Whenever this pin
voltage exceeds V
ISNS(PK)
threshold in magnitude,
the gate drive is instantaneously disabled. Any
external filtering of the ISNS pin must be
performed carefully in order to ensure that the
integrity of the current sense signal is maintained
for cycle-by-cycle protection.
Pin FREQ: This is the user-programmable
frequency pin. The switching frequency is
programmed by inserting a capacitor between
FREQ & COM pins. A pair of current sources
inside the IC source/sink current in/out of the
capacitor alternately thus generating a constant-
slope saw-tooth ramp signal between a pre-
determined peak & valley voltage pair (typically
between 2V to 4V). This saw-tooth signal is the
oscillator signal of the IC. The frequency of
operation of the IC can be programmed anywhere
between 48kHz and 200kHz by suitably sizing the
capacitor.
The FREQ-COM loop represents yet another very
important control loop to the IC and hence a
dedicated PCB trace loop is recommended in lay-
out (star-connection to GND potential) for noise
free, stable operation.
Pin OVP/EN: The OVP/EN pin is connected to the
input of the overvoltage comparator and is used to
detect output overvoltage situations. The output
voltage information is communicated to the OVP pin
using a resistive divider. This pin also serves the
second purpose of an ENABLE pin. The OVP/EN
pin can be used to activate the IC into “micropower
sleep” mode by pulling the voltage on this pin below
the V
SLEEP
threshold.
Pin VFB: The converter output voltage is sensed
via a resistive divider and fed into this pin. VFB pin
is the inverting input of the output voltage error
amplifier. The non-inverting input of this amplifier is
connected to an internal 5V reference. The
impedance of the divider string must be low enough
that it does not introduce substantial error due to the
input bias currents of the amplifier, yet high enough
to minimize power dissipation. Typical value of
external divider impedance will be 1MΩ. VFB pin is
also the inverting input to the Open Loop
comparator. The IC is held in Stand-by Mode
whenever VFB pin voltage is below V
OLP
threshold.
Pin VCC: This is the supply voltage pin of the IC
and sense node for the under-voltage lock out
circuit. It is possible to turn off the IC by pulling this
pin below the minimum turn off threshold voltage,
V
CC,UVLO
without damage to the IC. This pin is not
internally clamped.
Pin GATE: This is the gate drive output of the IC.
This drive voltage is internally clamped to 13V(Typ)
and provides a drive current of ±1.5A peak with
matched rise and fall times.
