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ISL6151CBZA
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
P16-P18
P19-P20
7
T
est Circuit and T
iming Diagrams
FIGURE 2A.
TYPICAL TEST CIRCUIT
FIGURE 2B.
TEST CIRCUIT FOR 600
s TIME-O
UT
FIGURE 3A.
OV TO GA
TE TIMING
FIGURE 3B.
UV TO GA
TE TIMING
FIGURE 3.
OV AND UV TO GA
TE TIMING
FIGURE 4A.
DRAIN TO PWRGD
TIMING (ISL6141)
FIGURE 4B.
DRAIN TO PWRGD TIMING (ISL6151)
FIGURE 4.
DRAIN TO PWRGD
/PWRGD TIMING
FIGURE 5A.
GA
TE TO PWRGD
(ISL6141)
FIGURE 5B.
GA
TE TO PW
RGD (ISL61
51)
FIGURE 5.
GA
T
E TO PWRGD
/PWRGD TIMING
OV
V
EE
5
7
6
4
3
2
GA
TE
DRAIN
UV
SENSE
PWRGD
1
V
DD
8
5V
V
OV
V
UV
48V
V
DRAIN
V
SENSE
ISL6141
ISL6151
R = 5K
+
-
.
OV
V
EE
5
7
6
4
3
2
GA
TE
DRAIN
UV
SENSE
PWRGD
1
V
DD
8
5V
V
OV
V
UV
48V
V
DRAIN
ISL6141
ISL6151
R = 5K
+
-
0.1K
0.9K
9.0K
GA
TE
t
PHLOV
t
PLHOV
0V
2V
1V
1.255V
1.230V
1V
0V
13.6V
OV Pin
GA
TE
t
PHLUV
t
PLHUV
2V
0V
1V
1.120V
1.255V
1V
13.6V
0V
UV Pin
t
PHLDL
DRAIN
PWRGD
1.3V
1.0V
V
EE
V
PG
PWRGD
t
PHLDL
1.3V
1.0V
DRAIN
V
EE
V
PG
t
PHLGH
2.5V
1.0V
GA
TE
PWRGD
V
GA
TE
- V
GA
TE
= 0V
V
GH
t
PLHGH
GA
TE
PWRGD
2.5V
1.0V
V
PWRGD
- V
DRAIN
= 0V
V
GA
TE
- V
GA
TE
= 0V
V
GH
ISL6141, ISL6151
8
FIGURE 6.
SENSE TO GA
TE TIMIN
G
FIGURE 7.
SENSE TO GA
TE (Hard Fau
lt
) TIMING
FIGURE 8.
CURRENT LIMIT TO GA
TE T
IMING
T
est Circuit and T
iming Diagrams
(Continued)
SENSE
GA
TE
t
PHLSENSE
~4V (depends on FET threshold)
50mV
SENSE
GA
TE
t
PHLHF
V
EE
210mV
13.6V
0V
t
PHLCB
UV
1.0V
1.0V
GA
TE
T
ypical Performance Curves
FIGURE 9.
SUPPL
Y CURRENT VS. SUPPL
Y VOL
T
AGE (25
o
C)
FIGURE 10.
SUPPL
Y CURRENT VS. TEMPERA
TURE, V
DD
= 48V
0
0.
5
1
1.
5
2
2.
5
3
3.
5
4
4.
5
10
20
30
40
5
0
60
70
80
90
100
Suppl
y V
ol
ta
ge
(VDD
)
IDD (mA)
1.
9
5
2
2.
0
5
2.
1
2.
1
5
2.
2
2.
2
5
2.
3
-
4
0
-
2
0
0
2
04
0
6
08
0
1
0
0
T
emp
er
at
u
r
e (
C
)
IDD (mA)
ISL6141, ISL6151
9
FIGURE 1
1.
SUPPL
Y CURRENT VS TEMPERA
TURE, V
DD
= 80V
FIGURE 12.
GA
TE VOL
T
AGE VS SUPPL
Y VOL
T
AGE (25
o
C)
FIGURE 13.
GA
TE VOL
T
AGE VS TEMPERA
TURE, V
DD
= 48V
FIGURE 14.
GA
TE VOL
T
AGE VS TEMPERA
TURE, V
DD
= 80V
FIGURE 15.
GA
TE VOL
T
AGE VS TEMPERA
TURE, V
DD
= 20V
FIGURE 16.
GA
TE PULL-UP C
URRENT VS TEMPERA
TURE
T
ypical Performance Curves
(Continued)
2.
1
2.
1
5
2.
2
2.
2
5
2.
3
2.
3
5
2.
4
2.
4
5
-
4
0
-
2
0
0
2
04
06
08
0
1
0
0
T
emp
er
at
u
r
e (
C
)
IDD (mA)
0
2
4
6
8
10
12
14
16
10
20
30
40
50
60
70
80
100
Suppl
y V
ol
ta
ge
(VDD
)
Gate Voltage (V)
13.
3
13.
4
13.
5
13.
6
13.
7
13.
8
13.
9
14
-
4
0
-
2
0
0
2
0
4
06
08
0
1
0
0
T
emp
er
at
u
r
e
(
C
)
Gate Voltage (V)
13.
4
13.
5
13.
6
13.
7
13.
8
13.
9
14
-40
-20
0
20
40
60
80
100
T
emp
er
at
u
r
e
(
C
)
Gate Voltage (V)
13.
4
13.
5
13.
6
13.
7
13.
8
13.
9
14
-
4
0
-
2
0
0
2
04
06
0
8
0
1
0
0
T
emp
er
at
u
r
e (
C
)
Gate Voltage (V)
41
42
43
44
45
46
47
48
49
50
-40
-
20
0
20
40
60
80
100
T
emp
er
at
u
r
e
(
C
)
Gate Current (uA)
ISL6141, ISL6151
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
P16-P18
P19-P20
ISL6151CBZA
Mfr. #:
Buy ISL6151CBZA
Manufacturer:
Renesas / Intersil
Description:
Hot Swap Voltage Controllers W/ANNEAL 8LD 0+70 HISIDE HOTPLUG CONTR
Lifecycle:
New from this manufacturer.
Delivery:
DHL
FedEx
Ups
TNT
EMS
Payment:
T/T
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Union
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