LTC3459
6
3459fc
PIN FUNCTIONS
V
IN
(Pin 1/Pin 6/Pin 6): Input Supply Pin. Bypass V
IN
with
a low ESR, ESL ceramic capacitor of at least 1μF.
V
OUT
(Pin 2/Pin 2/Pin 5): Regulated Output Voltage of
the Boost Regulator. Bypass V
OUT
with a low ESR, ESL
ceramic capacitor between 2.2μF and 10μF. V
OUT
ripple
increases with smaller capacitors.
SHDN (Pin 3/Pin 1/Pin 4): Master Shutdown Input. Driving
SHDN low disables all IC functions and reduces quiescent
current from the battery to less than 1μA. This pin must
be pulled above 1V to enable the IC.
FB (Pin 4/Pin 3/Pin 3): Input to the Burst Mode Comparator.
An external resistor divider connected between V
OUT
,
GND and this pin sets the output voltage to:
V
OUT
= 1.22(1 + R1/R2)
GND (Pin 5/Pin 5/Pin 2): Signal and Power Ground. Provide
a short, direct PCB path between GND and the (–) side of
the fi lter capacitors on V
IN
and V
OUT
.
SW (Pin 6/Pin 4/Pin 1): Switch Pin. Connect a 15μH to
33μH inductor between SW and V
IN
. Keep PCB trace lengths
as short and wide as possible to reduce EMI and voltage
overshoot. If the inductor current falls to zero, the internal
P-channel MOSFET synchronous rectifi er is turned off to
prevent reverse charging of the inductor.
Exposed Pad (Pin 7/Pin 7, DC and DCB Packages Only):
Ground. The Exposed Pad must be soldered to PCB.
(DC/DCB/S6 Packages)
BLOCK DIAGRAM
–
+
–
+
V
IN
I
ZERO
DETECT
I
ZO
I
PEAK
t
OFF
V
CC
V
OUT
SLEEP
DELAY
I
PEAK
DETECT
t
OFF
TIMER
V
SELECT
V
BEST
P-DRIVE
HYSTCOMP
N-DRIVE
SW1
SW
V
OUT
FB
R2
SD
SDB
3459 BD
R1
R
SD
THERMAL
SD
V
SELECT
V
BEST
V
CC
P/~N
I
ZO
SDB
SD
N-DRIVE
P-DRIVE
QB
Q
QB
Q
RD
S
RD
S
QB
Q
REFERENCE
V
CC
SHDNGND
REFOK
OFF ON
