Data Sheet ADM8690/ADM8691/ADM8695
Rev. C | Page 13 of 24
WATCHDOG OUTPUT (WDO) ( / ) ADM8691 ADM8695
The watchdog output (
WDO
pin on the / )
provides a status output that goes low if the watchdog timer
times out and remains low until set high by the next transition
on the watchdog input.
ADM8691 ADM8695
WDO
is also set high when V
CC
goes
below the reset threshold.
8
7
OSC SEL
OSC IN
ADM8691/
ADM8695
CLOCK
0 TO 500kHz
00093-008
Figure 17. External Clock Source
8
7
C
OSC
00093-009
OSC SEL
OSC IN
ADM8691/
ADM8695
Figure 18. External Capacitor
NC
NC
8
7
00093-010
OSC SEL
OSC IN
ADM8691/
ADM8695
Figure 19. Internal Oscillator (1.6 Second Watchdog)
NC
8
7
00093-011
OSC SEL
OSC IN
ADM8691/
ADM8695
Figure 20. Internal Oscillator (100 ms Watchdog)
CE GATING AND RAM WRITE PROTECTION
( / ) ADM8691 ADM8695
The ADM8691/ADM8695 include memory protection circuitry
that ensures the integrity of data in memory by preventing write
operations when V
CC
is at an invalid level. Two additional pins
(
CE
IN
and
CE
OUT
) can be used to control the chip enable or write
inputs of CMOS RAM. When V
CC
is present,
CE
OUT
is a buffered
replica of
CE
IN
, with a 3 ns propagation delay. When V
CC
falls
below the reset voltage threshold or V
BATT
, an internal gate forces
CE
OUT
high, independent of
CE
IN
.
CE
OUT
typically drives the
CE
,
CS
, or write input of battery
backed-up CMOS RAM. This ensures the integrity of the data
in memory by preventing write operations when V
CC
is at an
invalid level. Similar protection of EEPROMs can be achieved
using the
CE
OUT
pin to drive the store or write inputs.
ADM8691/
ADM8695
CE
OUT
V
CC
LOW = 0
V
CC
OK = 1
C
E
IN
00093-012
Figure 21. Chip Enable Gating
RESET
LOW LINE
V1
V2V2
V1
V
CC
t
1
t
1
t
1
= RESET TIME
V1 = RESET VOLTAGE THRESHOLD LOW
V2 = RESET VOLTAGE THRESHOLD HIGH
HYSTERESIS = V2 – V1
CE
IN
CE
OUT
0
0093-013
Figure 22. Chip Enable Timing
ADM8690/ADM8691/ADM8695 Data Sheet
Rev. C | Page 14 of 24
PFO
is normally used to interrupt the microprocessor so
that data can be stored in RAM and the shutdown procedure
executed before power is lost.
POWER-FAIL WARNING COMPARATOR
An additional comparator is provided for early warning of
failure in the microprocessor power supply. The power-fail
input (PFI) is compared to an internal 1.3 V reference. The
power-fail output (
PFO
) goes low when the voltage at PFI is
less than 1.3 V.
1.3V
PFO
PFI
R1
R2
POWER-
FAIL
OUTPUT
POWER-
FAIL
INPUT
INPUT
POWER
00093-014
Typically, PFI is driven by an external voltage divider that senses
either the unregulated dc input to the system 5 V regulator or
the regulated 5 V output. The voltage divider ratio can be chosen
such that the voltage at PFI falls below 1.3 V several milliseconds
before the 5 V power supply falls below the reset threshold.
Figure 23. Power-Fail Comparator
Table 6. Input and Output Status in Battery Backup Mode
Signal Status
V
OUT
V
OUT
is connected to V
BATT
via an internal PMOS switch.
RESET
Logic low.
RESET Logic high. The open circuit output voltage is equal to V
OUT
.
LOW LINE
Logic low.
BATT ON Logic high. The open circuit voltage is equal to V
OUT
.
WDI
WDI is ignored. It is internally disconnected from its internal pull-up resistor and does not source or sink current as long as
its input voltage is between GND and V
OUT
. The input voltage does not affect supply current.
WDO
Logic high. The open circuit voltage is equal to V
OUT
.
PFI The power-fail comparator is turned off and has no effect on the power-fail output.
PFO
Logic low.
CE
IN
CE
IN
is ignored. It is internally disconnected from its internal pull-up resistor and does not source or sink current as long as
its input voltage is between GND and V
OUT
. The input voltage does not affect supply current.
CE
OUT
Logic high. The open circuit voltage is equal to V
OUT
.
OSC IN OSC IN is ignored.
OSC SEL OSC SEL is ignored.
Data Sheet ADM8690/ADM8691/ADM8695
Rev. C | Page 15 of 24
APPLICATIONS INFORMATION
INCREASING THE DRIVE CURRENT
If the continuous output current requirements at V
OUT
exceed
100 mA, or if a lower V
CC
− V
OUT
voltage differential is desired,
an external PNP pass transistor can be connected in parallel
with the internal transistor. The BATT ON output (ADM8691/
ADM8695) can directly drive the base of the external transistor.
PNP TRANSISTOR
0.1µF 0.1µF
BATTERY
V
BATT
V
CC
V
OUT
BATT
ON
5V INPUT
POWER
00093-024
ADM8691/
ADM8695
Figure 24. Increasing the Drive Current
USING A RECHARGEABLE BATTERY FOR BACKUP
If a capacitor or a rechargeable battery is used for backup, the
charging resistor should be connected to V
OUT
to eliminate the
discharge path that would exist during power-down if the
resistor were connected to V
CC
.
R
0.1µF
0.1µF
V
BATT
V
CC
V
OUT
5V INPUT
POWER
RECHARGEABLE
BATTERY
V
OUT
V
BATT
R
I =
00093-025
Figure 25. Rechargeable Battery
ADDING HYSTERESIS TO THE POWER-FAIL
COMPARATOR
For increased noise immunity, hysteresis can be added to
the power-fail comparator. Because the comparator circuit is
noninverting, hysteresis can be added simply by connecting a
resistor between the
PFO
output and the PFI input, as shown in
Figure 26. When
PFO
is low, Resistor R3 sinks current from the
summing junction at the PFI pin. When
PFO
is high, the series
combination of R3 and R4 sources current into the PFI summing
junction. This results in differing trip levels for the comparator.
5V
0V
PF
0V V
L
V
H
V
IN
V
H
= 1.3V
V
L
= 1.3V
ASSUMING R4 < < R3 THEN
HYSTERESIS V
H
– V
L
= 5V
1+
R1
R2
R1
R3
)(
+
1+
R1
R2
R1 (5V – 1.3V)
R3 (1.3V (R3 + R4))
)(
1.3V
PFI
PFO
TO
MICROPROCESSOR
NMI
5V
V
CC
7V TO 15V
INPUT
POWER
7805
R1
R2
R3
R4
00093-026
R1
R2
)(
Figure 26. Adding Hysteresis to the Power-Fail Comparator
MONITORING THE STATUS OF THE BATTERY
The power-fail comparator can be used to monitor the status
of the backup battery instead of the power supply, if desired
(see Figure 27). The PFI input samples the battery voltage and
generates an active low
PFO
signal when the battery voltage
drops below a selected threshold. It may be necessary to apply
a test load to determine the loaded battery voltage. This is done
under processor control using
CE
OUT
. Because
CE
OUT
is forced
high during the battery backup mode, the test load is not applied
to the battery while it is in use, even if the microprocessor is not
powered.
PFI
BATTERY
10M
10M
R1
R2
5V INPUT
POWER
20k
OPTIONAL
TEST LOAD
LOW BATTERY
SIGNAL TO
MICROPROCESSOR
I/O PIN
V
BATT
V
CC
CE
OUT
CE
IN
PFO
00093-027
FROM
MICROPROCESSOR
I/O PIN APPLIES
TEST LOAD
TO BATTERY
Figure 27. Monitoring the Battery Status

ADM8691ARW

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Supervisory Circuits IMPROVED ADM691 I.C.
Lifecycle:
New from this manufacturer.
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