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MAX395CAG+T

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16
MAX395
Serially Controlled, Low-Voltage,
8-Channel SPST Switch
4 _______________________________________________________________________________________
SCLK Frequency f
SCLK
RESET Minimum Pulse Width t
RW
70 nsT
A
= +25°C
Fall Time of DOUT (Note 4) t
DF
100 ns
20% of V+ to 70% of V+,
C
L
= 10pF
C, E, M
Allowable Fall Time at DIN, SCLK
(Note 4)
t
SCF
2 µs
20% of V+ to 70% of V+,
C
L
= 10pF
C, E, M
Allowable Rise Time at DIN, SCLK
(Note 4)
t
SCR
2 µs
20% of V+ to 70% of V+,
C
L
= 10pF
C, E, M
Rise Time of DOUT (Note 4) t
DR
100 ns
20% of V+ to 70% of V+,
C
L
= 10pF
C, E, M
DIN Data Valid after Falling SCLK
(Note 4)
t
DO
400
ns
Data Hold Time
Data Setup Time t
DS
200 17 ns
t
DH
0 -17
85
50% of SCLK to 10% of DOUT,
C
L
= 10pF
SCLK Low Time
ns
t
CL
C, E, M
190 ns
T
A
= +25°C
C, E, M
C, E, M
PARAMETER SYMBOL
MIN TYP MAX
(Note 1)
UNITS
C, E, M
SCLK High Time
CS Lag Time t
CSH2
240 ns
t
CH
190
CS Lead Time
Cycle Time
ns
t
CH
+t
CL
480
t
CSS
240 ns
C, E, M
0 2.1
ns
MHz
C, E, M
C, E, M
C, E, M
C, E, M
CONDITIONS
SERIAL DIGITAL INTERFACE
TIMING CHARACTERISTICS—Dual Supplies (Figure 1)
(V+ = +4.5V to +5.5V, V- = -4.5V to -5.5V, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at T
A
= +25°C.)
Note 1: The algebraic convention is used in this data sheet; the most negative value is shown in the minimum column.
Note 2: ∆R
ON
= R
ON(max)
- R
ON(min)
. On-resistance match between channels and on-resistance flatness are guaranteed only with
specified voltages. Flatness is defined as the difference between the maximum and minimum value of on-resistance as
measured over the specified analog signal range.
Note 3: Leakage parameters are 100% tested at maximum rated hot temperature and guaranteed by correlation at room temp.
Note 4: Guaranteed by design.
Note 5: Leakage testing at single supply is guaranteed by testing with dual supplies.
Note 6: See Figure 6. Off isolation = 20log
10
V
COM
/V
NO
, V
COM
= output. NO = input to off switch.
Note 7: Between any two switches. See Figure 3.
MAX395
Serially Controlled, Low-Voltage,
8-Channel SPST Switch
_______________________________________________________________________________________ 5
ELECTRICAL CHARACTERISTICS—Single +5V Supply
(V+ = +4.5V to +5.5V, V- = 0V, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at T
A
= +25°C.)
SWITCH DYNAMIC CHARACTERISTICS
DIGITAL I/O
ANALOG SWITCH
VV
COM
,V
NO
Analog Signal Range
COM, NO On-Resistance R
ON
225
Ω
V+ = 5V, V
COM
= 3.5V,
I
NO
= 1mA
C, E, M
125 175T
A
= +25°C
Channel-to-Channel Crosstalk
(Note 7)
V
CT
<-90 dB
R
L
= 50Ω, C
L
= 15pF,
V
NO
= 1V
RMS
, f = 100kHz
T
A
= +25°C
Off Isolation (Note 6) V
ISO
-90 dB
R
L
= 50Ω, C
L
= 15pF,
V
NO
= 1V
RMS
, f = 100kHz
T
A
= +25°C
SCLK Input Hysteresis SCLK
HYST
mV100C, E, M
DOUT Output Voltage Logic Low V
DOUT
V0 0.4I
DOUT
= 1.6mA C, E, M
COM Off Leakage Current
(Notes 4, 5)
-10 10
nA
V+ = 5.5V, V
COM
= 0V,
V
NO
= 4.5V
C, E, M
-0.1 0.002 0.1T
A
= +25°C
I
COM(OFF)
-10 10
V+ = 5.5V, V
COM
= 4.5V,
V
NO
= 0V
C, E, M
-0.1 0.002 0.1T
A
= +25°C
NO Off Leakage Current
(Notes 4, 5)
-10 10
nA
V+ = 5.5V, V
COM
= 0V,
V
NO
= 4.5V
C, E, M
-0.1 0.002 0.1T
A
= +25°C
-20 20C, E, M
-0.2 0.002 0.2T
A
= +25°C
PARAMETER SYMBOL
MIN TYP MAX
(Note 2)
UNITS
Charge Injection (Note 4) V
CTE
210pC
Turn-On Time t
ON
200 400
ns
Turn-Off Time t
OFF
90 400
ns
I
NO(OFF)
-10 10
V+ = 5.5V, V
COM
= 4.5V,
V
NO
= 0V
C, E, M
-0.1 0.002 0.1T
A
= +25°C
Break-Before-Make Delay t
BBM
15 ns
From rising edge of CS
From rising edge of CS
From rising edge of CS
DIN, SCLK, CS, RESET Input
Voltage Logic Threshold Low
DIN, SCLK, CS, RESET Input
Current Logic High or Low
I
IH
, I
IL
V
IL
µA
500
C
L
= 1nF, V
NO
= 0V, R
S
= 0Ω
-1 0.03 1
V
DIN
, V
SCLK
,
V
CS
= 0.8V or 2.4V
C, E, M
500
DOUT Output Voltage Logic High
DIN, SCLK, CS, RESET Input
Voltage Logic Threshold High
V
IH
0.8
V- V+
T
A
= +25°C
T
A
= +25°C
T
A
= +25°C
V
V
DOUT
C, E, M
V2.8 V+
2.4
CONDITIONS
C, E, M
T
A
= +25°C
C, E, M
C, E, M
V
I
DOUT
= -0.8mA C, E, M
nA
COM On Leakage Current
(Notes 4, 5)
I
COM(ON)
C, E, M
V+ = 5.5V,
V
COM
= V
NO
= 4.5V
V+, V- Supply Current I+
720
µA
DIN = CS = SCLK = 0V or
V+, RESET = 0V or V+
T
A
= +25°C
C, E, M 30
POWER SUPPLY
MAX395
Serially Controlled, Low-Voltage,
8-Channel SPST Switch
6 _______________________________________________________________________________________
TIMING CHARACTERISTICS—Single +5V Supply (Figure 1)
(V+ = +4.5V to +5.5V, V- = 0V, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at T
A
= +25°C.)
Note 1: The algebraic convention is used in this data sheet; the most negative value is shown in the minimum column.
Note 2: ∆R
ON
= R
ON(max)
- R
ON(min)
. On-resistance match between channels and on-resistance flatness are guaranteed only with
specified voltages. Flatness is defined as the difference between the maximum and minimum value of on-resistance as
measured over the specified analog signal range.
Note 3: Leakage parameters are 100% tested at maximum rated hot temperature and guaranteed by correlation at room temp.
Note 4: Guaranteed by design.
Note 5: Leakage testing at single supply is guaranteed by testing with dual supplies.
Note 6: See Figure 6. Off isolation = 20log
10
V
COM
/V
NO
, V
COM
= output. NO = input to off switch.
Note 7: Between any two switches. See Figure 3.
SERIAL DIGITAL INTERFACESERIAL DIGITAL INTERFACE
Rise Time of DOUT (Note 4) t
DR
100 ns
20% of V+ to 70% of V+,
C
L
= 10pF
C, E, M
Allowable Fall Time at DIN,
SCLK (Note 4)
t
SCF
2 µs
20% of V+ to 70% of V+,
C
L
= 10pF
C, E, M
Allowable Rise Time at DIN,
SCLK (Note 4)
t
SCR
2 µs
20% of V+ to 70% of V+,
C
L
= 10pF
C, E, M
DIN Data Valid after Falling SCLK
(Note 4)
t
DO
400
ns
Data Hold Time (Note 4)
Data Setup Time (Note 4) t
DS
200 17 ns
t
DH
0 -17
85
50% of SCLK to 10% of
DOUT, C
L
= 10pF
SCLK Low Time (Note 4)
ns
t
CL
C, E, M
190 ns
T
A
= +25°C
C, E, M
C, E, M
PARAMETER SYMBOL
MIN TYP MAX
(Note 2)
UNITS
C, E, M
SCLK High Time (Note 4)
CS Lag Time (Note 4) t
CSH2
240 ns
t
CH
190
CS Lead Time (Note 4)
Cycle Time (Note 4)
SCLK Frequency f
SCLK
ns
0 2.1 MHz
t
CH
+t
CL
480
t
CSS
240 ns
C, E, M
ns
C, E, M
C, E, M
C, E, M
C, E, M
CONDITIONS
C, E, M
20% of V+ to 70% of V+,
C
L
= 10pF
ns100t
DF
Fall Time of DOUT (Note 4)
RESET Minimum Pulse Width t
RW
70 nsT
A
= +25°C
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16

MAX395CAG+T

Mfr. #:
Buy MAX395CAG+T
Manufacturer:
Maxim Integrated
Description:
Analog Switch ICs Serially Controlled 8Ch SPST Switch
Lifecycle:
New from this manufacturer.
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