MAX11080/MAX11081
12-Channel, High-Voltage
Battery-Pack Fault Monitors
______________________________________________________________________________________ 19
C12
C11
C2
C1
ALRM
L
SHDN
C0
AGND
DCIN
GND
U
DC
ISOLATOR
MODULE
N+1
C12
C11
CP+
ALRM
U
C2
C1
C0
AGND
DCIN
GND
U
MODULE
N
BUS BAR
OPTIONAL
TO MAINTAIN
ALARM
COMMUNICATION
Figure 15. GND
U
Connection: AC-Coupled to Next Module,
DC-Coupled to Present Module
C12
C11
C2
C1
C0
AGND
DCIN
GND
U
MODULE
N+1
C12
C11
C2
C1
C0
AGND
DCIN
GND
U
MODULE
N
BUS BAR
ALRM
L
SHDN
CP+
ALRM
U
Figure 16. GND
U
Connection: DC-Coupled with the
Communication Bus
MAX11080/MAX11081
and then VDD
U
. If SHDN < 0.6V, the MAX11080/
MAX11081 shut down.
Figure 17 shows the shutdown circuit interface of two
daisy-chain devices.
When SHDN is high for device n, the charge pump is
enabled and begins to charge the capacitors in the
interface circuit. When the voltage of the SHDN pin for
device (n+1) rises above the VIH threshold, that device
begins its power-up sequence. This action propagates
up the daisy-chain until the last battery module is
enabled. Conversely, pulling SHDN to AGND powers
down a module and thus propagates the power-down
to all higher daisy-chained modules as the charge on
their SHDN capacitors is dissipated. The zener diodes
provide additional ESD protection. The filter capacitors
and resistors are sized to provide robust noise immuni-
ty. The diode from the CP+ pin should be S1B or a simi-
lar low-leakage type for high-temperature stability.
The SHDN pin has a weak internal pulldown resistor on
the order of 12M. A 200k or similar resistor from SHDN
to AGND should be installed to ensure that the SHDN pin
is pulled low when the active SHDN signal is propagated
up the daisy-chain bus. The resistor is not needed for
applications that tie SHDN high at all times. The typical
SHDN rising edge propagation time from one daisy-
chained module to the next is 1.5ms.
For FMEA detectability, the SHDN pin is designed to
detect logic transitions that could be indicative of a
short circuit to the ALRM
L
pin. The SHDN pin circuit
shown in Figure 18 provides some immunity for rare
glitches at the SHDN pin, such as those during power-
up, that are not a result of a short to ALRM
L
. The SHDN
pin signal is fed as a clock to a 5-bit counter. When the
counter reaches the maximum count of 32, the full flag
is set and acts as a clock to a D flip-flop. When the D
flip-flop is clocked, its output goes high to signal the
FMEA fault condition and trigger the alarm. In this way,
the device goes into the alarm state only after 32 pulses
on the SHDN pin have occurred. To clear the FMEA
fault state, a POR of the device must be activated. The
application circuit should ensure that the SHDN pin is
glitch free and only toggles when a shutdown or power-
down event is intended. This FMEA detection circuit
should not be considered as a provision to filter out
noise or glitches on the SHDN pin.
C1 Input Absolute Maximum Rating
The C1 input is limited to V
DCIN
- 0.6V above AGND or
a maximum of 20V if the SHDN pin is asserted. If an
application requires that the 20V restriction be removed
during active shutdown, then a 4.0V zener diode can
be added from V
AA
to AGND. This protects V
AA
and
allows the C1 input to go to V
DCIN
- 0.6V regardless of
the SHDN state. It also allows the differential C1 to C0
voltage to range from -0.3V to +80V.
Cell-Connection and Detection
An individual MAX11080/MAX11081 can be connected to
as many as 12 series-connected cells. To accommodate
configurations with fewer cells, unused cell inputs must be
12-Channel, High-Voltage
Battery-Pack Fault Monitors
20 ______________________________________________________________________________________
S1B
CP+
SHDN
AGND
GND
U
DEVICE
(n)
DEVICE
(n+1)
150I 1kI
5.6V 5.6V 68nF 200kI100nF
ALRM
U
VAA
D
FMEA FLAG
ALRM
L
INTERNAL ALARM
SIGNAL
Q
CLK
RST
PORb
FULL FLAG
5 BIT UP
COUNTER
SHDN
Figure 17. Shutdown Circuit Interface
Figure 18. Internal FMEA SHDN Pin Functionality Circuit
shorted together, but Cell 1 must always be populated.
The designer can choose which cell inputs to leave
unused. The example application circuits recommended
are the most efficient configurations.
At power-up, the part compares the voltage applied to
each cell input with a nominal cell-detection threshold
voltage of 0.7V. If the cell voltage is less than the cell-
detection threshold, undervoltage detection is disabled
for that cell input. If the voltage at the input is 0.7V or
greater, undervoltage detection is specified by the state
of the UVSEL_ inputs. Overvoltage detection is always
enabled for all cell-voltage inputs. The cell-connection
detection occurs just before the MAX11080/MAX11081
are fully functional as shown in Figure 12 under NUMBER
OF CELLS DETECTED.
TOPSEL Function
The TOPSEL pin is used to indicate to a device whether
it is the top device in the daisy-chain stack. The top
daisy-chain device is responsible for generating the
heartbeat signal at the top of the ALRM_ pin bus. This
heartbeat propagates along the chain toward the host.
To designate a device as the top device, the TOPSEL
pin should be connected to V
AA
. For all other devices
in a daisy-chain, this pin should be connected to
AGND. The TOPSEL pin has a weak internal pulldown
resistor, but this resistor should not be relied upon as
the sole means of setting the TOPSEL logic level. The
logic level of the TOPSEL pin is not latched internally at
startup and is continuously sampled during operation.
The ALRM
U
input should be connected to GND
U
for the
top module as good design practice to prevent noise
pickup even though the input logic level is ignored.
For a single device or DC-coupled daisy-chain applica-
tion, the device can be operated in an alarm level mode
instead of heartbeat mode by tying TOPSEL to AGND for
all devices. In this mode of operation, ALRM
L
passes the
signal of ALRM
U
when the device is not in the alarm state.
ALRM
L
drives high when the device is in the alarm state.
ALRM
U
must be tied to GND
U
for the topmost device for
this application. The following table summarizes the
operation of TOPSEL and ALRM
L
for level mode:
Internal Self-Test
The MAX11080/MAX11081 perform an internal self-test
during power-up according to the linear regulator
power-up flowchart (Figure 12). Each overvoltage com-
parator is tested for the ability to detect an internally
generated overvoltage test condition. This is done by
using the ground voltage level as the threshold refer-
ence in place of the usual threshold level. Figure 8
shows the connection for this test-mode compare level.
If all comparators can detect the internally generated
overvoltage test event, part operation continues. If any
comparator fails to detect the internally generated over-
voltage test event, a fault is signaled using the ALRM
L
pin. The device must be power cycled to retest the
comparators and attempt to clear this fault condition.
Failure Mode and Effects Analysis
High-voltage battery-pack systems can be subjected to
severe stresses during in-service fault conditions and
could experience similar conditions during the manufac-
turing and assembly process. The MAX11080/MAX11081
are designed with high regard to these potential states.
Open and short circuits at the package level must be
readily detected for fault diagnosis and should be toler-
ated whenever possible. A number of circuits are
employed within the MAX11080/MAX11081 specifically
to detect such conditions and progress to a known
device state. Table 3 summarizes other conditions typi-
cal in a normal manufacturing process along with their
effect on the MAX11080/MAX11081 devices.
See Table 4 for the FMEA analysis of the MAX11080/
MAX11081. If the cell voltage is within the monitor
range, the heartbeat signal on ALRM
L
resumes once
the fault condition (either open or short) is removed,
unless otherwise specified.
MAX11080/MAX11081
12-Channel, High-Voltage
Battery-Pack Fault Monitors
______________________________________________________________________________________ 21
ALRM
L
TOPSEL ALRM
U
No alarm
Alarm
00
ALRM
U
1
1X
Heartbeat
1

MAX11080IUU+T

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Battery Management 12 Ch Hi Volt Batt Pack Fault Monitor
Lifecycle:
New from this manufacturer.
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