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NCP1575DG

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16
NCP1575
http://onsemi.com
4
MAXIMUM RATINGS
Rating Value Unit
Operating Junction Temperature 150 °C
Storage Temperature Range −65 to 150 °C
ESD Susceptibility (Human Body Model) 2.0 kV
ESD Susceptibility (Charged Device Model) 200 V
Lead Temperature Soldering: Reflow: (Note 1) 230 peak °C
Moisture Sensitivity Level 2 −
Package Thermal Resistance, SOIC−8: Junction−to−Case, R
JC
Junction−to−Ambient, R
JA
48
165
°C/W
°C/W
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
1. 60 second maximum above 183°C.
MAXIMUM RATINGS
Pin Name Symbol V
MAX
V
MIN
I
SOURCE
I
SINK
IC Power Input V
CC
20 V −0.5 V N/A 1.5 A Peak, 450 mA DC
Compensation Capacitor COMP 6.0 V −0.5 V 10 mA 10 mA
Voltage Feedback Input V
FB
6.0 V −0.5 V 1.0 mA 1.0 mA
Frequency Adjust R
OSC
6.0 V −0.5 V 1.0 mA 1.0 mA
High−Side FET Driver GATE(H) 20 V −0.5 V, −2.0 V for 50 ns 1.5 A Peak, 200 mA DC 1.5 A Peak, 200 mA DC
Low−Side FET Driver GATE(L) 20 V −0.5 V, −2.0 V for 50 ns 1.5 A Peak, 200 mA DC 1.5 A Peak, 200 mA DC
Ground GND 0.5 V −0.5 V 1.5 A Peak, 450 mA DC N/A
ELECTRICAL CHARACTERISTICS (0°C < T
J
< 125°C, 9.0 V < V
CC
< 20 V, C
GATE(H)
= C
GATE(L)
= 3.3 nF,
C
COMP
= 0.1 F, R
OSC
= 74 k; unless otherwise specified.) Note 2
Characteristic
Test Conditions Min Typ Max Unit
Error Amplifier
V
FB
Bias Current V
FB
= 0 V − 0.4 2.0 A
COMP Source Current COMP = 1.5 V, V
FB
= 0.8 V 15 30 60 A
COMP Sink Current COMP = 1.5 V, V
FB
= 1.2 V 15 30 60 A
Reference Voltage COMP = V
FB
T
J
< 25°C
0.970
0.965
0.980
0.980
0.990
0.995
V
V
COMP Max Voltage V
FB
= 0.8 V 2.4 3.1 − V
COMP Min Voltage V
FB
= 1.2 V − 0.1 0.2 V
COMP Fault Discharge Current at UVLO COMP = 1.2 V, V
CC
= 6.9 V 0.5 1.2 − mA
COMP Fault Discharge Threshold to
Reset UVLO
− 0.1 0.25 0.3 V
Open Loop Gain − − 98 − dB
Unity Gain Bandwidth − − 20 − kHz
PSRR @ 1.0 kHz − − 70 − dB
Output Transconductance − − 32 − mmho
Output Impedance − − 2.5 − M
2. Characteristics at temperature extremes are guaranteed via correlation using quality statistical control methods.
NCP1575
http://onsemi.com
5
ELECTRICAL CHARACTERISTICS (0°C < T
J
< 125°C, 9.0 V < V
CC
< 20 V, C
GATE(H)
= C
GATE(L)
= 3.3 nF,
C
COMP
= 0.1 F, R
OSC
= 74 k; unless otherwise specified.) Note 3
Characteristic
Test Conditions Min Typ Max Unit
GATE(H) and GATE(L)
Rise Time 1.0 V < GATE(L), GATE(H) < V
CC
− 2.0 V,
V
CC
= 12 V
− 40 80 ns
Fall Time V
CC
− 2.0 V < GATE(L), GATE(H) < 1.0 V,
V
CC
= 12 V
− 40 80 ns
GATE(H) to GATE(L) Delay GATE(H) < 2.0 V, GATE(L) > 2.0 V 40 60 105 ns
GATE(L) to GATE(H) Delay GATE(L) < 2.0 V, GATE(H) > 2.0 V 40 60 105 ns
Minimum Pulse Width GATE(X) = 4.0 V − 250 − ns
High Voltage (AC) Measure GATE(L) or GATE(H)
0.5 nF < C
GATE(H)
= C
GATE(L)
< 10 nF, Note 4
V
CC
−
0.5
V
CC
− V
Low Voltage (AC) Measure GATE(L) or GATE(H)
0.5 nF < C
GATE(H)
= C
GATE(L)
< 10 nF, Note 4
− 0 0.5 V
GATE(H)/(L) Pull−Down Resistance to GND. Note 4 20 50 115 k
PWM Comparator
PWM Comparator Offset V
FB
= 0 V, Increase COMP Until GATE(H)
Starts Switching
0.415 0.465 0.525 V
Ramp Max Duty Cycle − − 80 − %
Artificial Ramp Duty Cycle = 50%, R
OSC
= 74 k 50 63 75 mV
Transient Response COMP = 1.5 V, V
FB
20 mV Overdrive. Note 4 − 200 300 ns
V
FB
Input Range Note 4 0 − 1.4 V
Oscillator
Switching Frequency R
OSC
Not Used
R
OSC
= 74 k
170
240
200
280
230
320
kHz
kHz
General Electrical Specifications
V
CC
Supply Current COMP = 0 V (No Switching) − 9.0 12 mA
Start Threshold GATE(H) Switching, COMP Charging 8.0 8.5 9.0 V
Stop Threshold GATE(H) Not Switching, COMP Discharging 7.0 7.5 8.0 V
Hysteresis Start − Stop 0.75 1.0 1.25 V
3. Characteristics at temperature extremes are guaranteed via correlation using quality statistical control methods.
4. Guaranteed by design. Not tested in production.
NCP1575
http://onsemi.com
6
PACKAGE PIN DESCRIPTION
PIN # PIN SYMBOL FUNCTION
1 V
CC
Power supply input.
2 R
OSC
Frequency adjust pin. If not used, oscillator frequency is nominally 200 kHz. Connecting R
OSC
to ground
through a single resistor will increase oscillator frequency.
3 NC No connect.
4 COMP Error amp output. PWM comparator reference input. A capacitor to LGND provides error amp compensa-
tion and Soft−Start. Pulling pin < 0.415 V locks gate outputs to a zero percent duty cycle state.
5 GATE(H) High−side switch FET driver pin. Capable of delivering peak currents of 1.5 A.
6 GATE(L) Low−side synchronous FET driver pin. Capable of delivering peak currents of 1.5 A.
7 V
FB
Error amplifier and PWM comparator input.
8 GND Power supply return.
Oscillator
200 kHz
Figure 4. Block Diagram
−
+
+
−
UVLO Comp
SQ
UVLO Latch
R
V
CC
GND
8.5 V/7.5 V
−
+
+
−
0.25 V
−
+
+
−
0.98 V
Error Amp
V
FB
COMP
−
+
PWM Comp
− +
0.465 V
RQ
PWM Latch
S
Reset
Dominant
Set
Dominant
Frequency
Adjust
GATE(H)
GATE(L)
NC
R
OSC
V
CC
V
CC
Nonoverlap
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16

NCP1575DG

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Manufacturer:
ON Semiconductor
Description:
Switching Controllers Low Voltage Synchronous Buck
Lifecycle:
New from this manufacturer.
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