OMO ElectronicOMO Electronic
Expand menu
Hello, Sign inMy Account
0 Cart

LT3032EDE#PBF

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24
LT3032 Series
19
3032ff
For more information www.linear.com/LT3032
APPLICATIONS INFORMATION
If wiring modifications are not permissible for the applica-
tions, including series
resistance between the power supply
and the input of the LT3032 also stabilizes the application.
As little as 0.1Ω to 0.5Ω, often less, is effective in damp
-
ing the LC resonance. If the added impedance between
the power supply and the input is unacceptable, adding
ESR to the input capacitor also provides the necessary
damping of the LC resonance. However, the required ESR
is generally higher than the series impedance required.
Thermal Considerations
The power handling capability of the device is limited by
the maximum rated junction temperature (125°C). The
power dissipated by the device is made up of the follow
-
ing components:
1. Output current of each side multiplied by the respective
input/output voltage differential: (I
OUT
)(V
IN
to V
OUT
),
and
2. GND pin current for each side multiplied by its input
voltage: (I
GND
)(V
IN
)
The GND pin current of each side is found by examining
the GND Pin Current curves in the Typical Performance
Characteristics. Total power dissipation equals the sum
for both channels of the components listed above.
The LT3032 has internal thermal limiting designed to pro
-
tect each side of the regulator during overload conditions.
For continuous normal conditions, the maximum junction
temperature rating of 125°C must not be exceeded. It is
important to give careful consideration to all sources of
thermal resistance from junction to ambient. Additional
heat sources mounted nearby must also be considered.
The LT3032 is a surface mount device and heat sinking is
accomplished by using the heat spreading capabilities of
the PC board and its copper traces. Copper board stiffen
-
ers and
plated through-holes can also be used to spread
the heat generated by power devices.
Note
that the exposed pads (Pins 15 and 16) are elect-
rically connected to ground (GND) and the negative input
(INN) respectively.
The following table lists thermal resistance as a function
of copper area on a fixed board size. All measurements
were taken in still air on a 4-layer FR-4 board with 1oz
solid internal planes and 2oz external trace planes with a
total finished board thickness of 1.6mm.
Table 3. DE Package, 14-Lead DFN
COPPER AREA
BOARD AREA
THERMAL RESISTANCE
(JUNCTION-TO-AMBIENT)
TOPSIDE*
BACKSIDE
2500mm
2
2500mm
2
2500mm
2
32°C/W
1000mm
2
2500mm
2
2500mm
2
33°C/W
225mm
2
2500mm
2
2500mm
2
38°C/W
100mm
2
2500mm
2
2500mm
2
43°C/W
*Device is mounted on topside
For further information on thermal resistance and using
thermal information, refer to JEDEC standard JESD51,
notably JESD51-12.
PCB layers, copper weight, board layout and thermal vias
affect the resultant thermal resistance. This table provides
thermal resistance numbers for best-case 4-layer boards
with 1oz internal and 2oz external copper. Modern, mul
-
tilayer PCBs may not be able to achieve quite the same
level per
formance as found in this table.
LT3032 Series
20
3032ff
For more information www.linear.com/LT3032
APPLICATIONS INFORMATION
Calculating Junction Temperature
Example: Given a positive output voltage of 3.3V, a posi-
tive input
voltage of 4V to 6V, output current range from
10mA
to 150mA, negative output voltage of –3.3V, negative
input voltage of –5V to –6V, a negative output current of
–100mA, and a maximum ambient temperature of 50°C,
what will the maximum junction temperature be for a
2500mm
2
board with topside copper of 1000mm
2
?
The power in each side equals:
P
SIDE
= (V
IN(MAX)
– V
OUT
)(I
OUT(MAX)
)+(V
IN(MAX)
•I
GND
)
where,
I
OUTP(MAX)
= 150mA
V
INP(MAX)
= 6V
I
GND
at (I
OUTP
= 150mA, V
INP
= 6V) = 3.7mA
I
OUTN(MAX)
= –100mA
V
INN(MAX)
= –6V
I
GND
at (I
OUTN
= –100mA, V
INN
= –6V) = –1.5mA
The total power equals:
P
TOTAL
= P
POSITIVE
+ P
NEGATIVE
So,
P
POSITIVE
= 150mA(6V – 3.3V) + 3.7mA(6V) = 0.43W
P
NEGATIVE
= –100mA(–6V+3.3V)–1.5mA(–6V) =
0.28W
P
TOTAL
= 0.43W + 0.28W = 0.71W
Junction Temperature equals:
T
J
= T
A
+ P
TOTAL
• θ
JA
(using tables)
T
J
= 50°C + 0.71W • 33°C/W = 73.4°C
In this case, the junction temperature is below the maxi-
mum rating, ensuring reliable operation.
Protection
Features
The
LT3032 incorporates several protection features that
make it ideal for use in battery-powered circuits. In ad-
dition to the normal protection features associated with
monolithic
regulators, such as current limiting and thermal
limiting, the LT3032 is protected against reverse input
voltages and reverse output voltages on both channels.
Current limit protection and thermal overload protection
protect the device against current overload conditions at
the outputs of the part. For normal operation, the junction
temperature should not be allowed to exceed 125°C.
The positive input of the LT3032 withstands 20V reverse
voltage. The negative input also withstands reverse volt
-
age, but the negative input may not be more than 0.5V
(one
V
BE
) higher than the OUTN and SHDNN pins. This
provides protection against batteries that are plugged in
backwards.
The outputs of the LT3032 can be pulled to opposing volt
-
ages without damaging
the part. The outputs may be pulled
to the opposing polarity with a load that is common mode
between the two and one regulator starts before the other;
in this condition, it does not matter which regulator started
first. Both sides are capable of having the output pulled to
the opposing polarity and both will still start and operate.
If an
input is left open circuit or grounded, the corre-
sponding output can be pulled to its opposing polarity by
as much as 20V. The output will act like an open circuit;
no current will flow into or out of the pin. If the input is
powered by a voltage source, the output will source the
short-circuit current and will protect itself by thermal
limiting. In this case, grounding the respective SHDNP/
SHDNN pin will turn off that side of the LT3032 and stop
the output from sourcing current.
The ADJP pin can be pulled above or below ground by
±7V without damage to the device. If the input is left open
circuit or grounded, the ADJP pin acts like an open circuit
when pulled below ground and like a large resistor (typically
100k) in series with a diode when pulled above ground.
LT3032 Series
21
3032ff
For more information www.linear.com/LT3032
APPLICATIONS INFORMATION
In situations where the ADJP pin is connected to a resistor
divider that would pull the ADJP pin above its 7V clamp
voltage if the output is pulled high, the ADJP pin input
current must be limited to less than 5mA. For example, a
resistor divider is used to provide a 1.5V output from the
1.22V reference and the output is forced to 20V. The top
resistor of the divider must be chosen to limit the current
into the ADJP pin to less than 5mA when the ADJP pin is
at 7V. The 13V difference between OUTP and ADJP divided
by the 5mA maximum current into the ADJP pin yields a
minimum top resistor value of 2.6k.
In circuits where a backup battery is required on the posi
-
tive output, several different input/output conditions can
occur. The output voltage may be held up while the input
is either pulled to ground, pulled to some intermediate
voltage or is left open circuit. Current flow back into OUTP
follows the curve shown in Figure 6.
If the INP pin is forced below the OUTP pin or the OUTP
pin is pulled above the INP pin, input current typically
drops
to less than 2µA. This can happen if the device is
connected to a discharged (low voltage) battery and the
output is held up by a backup battery or a second regula
-
tor circuit. The state of the SHDNP pin has no effect on
the reverse output current if OUTP is pulled above INP.
Figure 6. Reverse Output Current
OUTP PIN VOLTAGE (V)
100
90
80
70
60
50
40
30
20
10
0
REVERSE OUTP PIN CURRENT (µA)
3032 F06
0 2 4 6
8
10
12 14 16 18 20
T
J
= 25°C, V
INP
= 0V
CURRENT FLOWS
INTO OUTP PIN
V
OUTP
= V
ADJP
(LT3032)
LT3032
LT3032-5
LT3032-15
LT3032-12
LT3032-3.3
Like many IC power regulators, the negative side of the
LT3032 has safe operating area (SOA) protection. The safe
operating area protection activates when the differential
voltage between INN and OUTN is greater than -7V. The
SOA protection decreases current limit as a function of
the voltage differential between INN and OUTN and keeps
the power transistor inside a safe operating region for all
values of forward input-to-output voltage. The protection
is designed to provide some output current at all values
of INN to OUTN differential voltage up to the Absolute
Maximum Rating. A 50µA load is required to maintain
regulation for INN to OUTN differential voltages greater
than –7V. When in shutdown, protection circuitry remains
active and will cause the output to rise slightly at zero load.
A small pre-load is needed for zero output, if desired (see
graph of Quiescent Current vs Input Voltage in Typical
Performance Characteristics).
When power to the negative side is first turned on, as the
input voltage rises, OUTN follows INN, allowing the regula
-
tor to start into very heavy loads. During start-up, as the
INN
voltage is rising, the differential voltage between INN
and OUTN is small, allowing
the negative side to supply
large
output currents. With a high INN voltage, a problem
can occur wherein removal of an output short will not al
-
low the output voltage to fully recover. Other regulators,
such as the LT1175, LT1964, and LT3080 also exhibit this
phenomenon, so it is not unique to the LT3032.
The problem occurs with a heavy output load when the INN
voltage is high and the OUTN voltage is low. Common situ
-
ations are
immediately after the removal of a short-circuit
or
when the SHDNN pin is pulled high after the INN pin
has already been turned on. The load line for such a load
may intersect the output current curve at two points. If
this happens, there are two stable operating points for the
negative side of the LT3032. With this double intersection,
the INN supply may need to be cycled down to zero and
brought up again to make OUTN recover.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24

LT3032EDE#PBF

Mfr. #:
Buy LT3032EDE#PBF
Manufacturer:
Analog Devices / Linear Technology
Description:
LDO Voltage Regulators Dual 200mA Positive/Negative, Low Noise, Low Dropout Linear Regulator
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet