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ADG772BCPZ-1REEL

P1-P3P4-P6P7-P9P10-P12P13-P13
Data Sheet ADG772
Rev. C | Page 3 of 12
Specifications
V
DD
= 2.7 V to 3.6 V, GND = 0 V, unless otherwise noted.
Table 1.
Parameter +25°C −40°C to +85°C Unit Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range 0 V to V
DD
V
On-Resistance (R
ON
) 6.7 Ω typ V
DD
= 2.7 V, V
S
= 0 V to V
DD
, I
DS
= 10 mA; see Figure 21
8.8 Ω max
On-Resistance Match 0.04 Ω typ V
DD
= 2.7 V, V
S
= 1.5 V, I
DS
= 10 mA
Between Channels (∆R
ON
) 0.2 Ω max
On Resistance Flatness (R
FL AT (ON)
)
3.3
Ω typ
V
DD
= 2.7 V, V
S
= 0 V to V
DD
, I
DS
= 10 mA
3.6 Ω max
LEAKAGE CURRENTS V
DD
= 3.6 V
Source Off Leakage I
S
(Off ) ±0.2 nA typ V
S
= 0.6 V/3.3 V, V
D
= 3.3 V/0.6 V; see Figure 22
Channel On Leakage I
D
, I
S
(On) ±0.2 nA typ V
S
= V
D
= 0.6 V or 3.3 V; see Figure 23
DIGITAL INPUTS
Input High Voltage, V
INH
1.35
V min
Input Low Voltage, V
INL
0.8 V max
Input Current, I
INL
or I
INH
0.005 µA typ V
IN
= V
INL
or V
INH
±0.1 µA max V
IN
= V
INL
or V
INH
Digital Input Capacitance, C
IN
2 pF typ
DYNAMIC CHARACTERISTICS
1
t
ON
9 ns typ R
L
= 50 Ω, C
L
= 35 pF
12.5 13.5 ns max V
S
= 2 V; see Figure 24
t
OFF
6 ns typ R
L
= 50 Ω, C
L
= 35 pF
9.5 10 ns max V
S
= 2 V; see Figure 24
Propagation Delay 250 ps typ R
L
= 50 Ω, C
L
= 35 pF
Propagation Delay Skew, t
SKEW
20 ps typ R
L
= 50 Ω, C
L
= 35 pF
Break-Before-Make Time Delay (t
BBM
) 5 ns typ R
L
= 50 Ω, C
L
= 35 pF
3.4 2.9 ns min V
S1
= V
S2
= 2 V; see Figure 25
Charge Injection
0.5
pC typ
V
D
= 1.25 V, R
S
= 0 Ω, C
L
= 1 nF; see Figure 26
Off Isolation 73 dB typ R
L
= 50 Ω, C
L
= 5 pF, f = 1 MHz; see Figure 27
Channel-to-Channel Crosstalk −90 dB typ S1A to S2A/S1B to S2B; R
L
= 50 Ω, C
L
= 5 pF,
f = 1 MHz; see Figure 28
−80 dB typ S1A to S1B/S2A to S2B; R
L
= 50 Ω, C
L
= 5 pF,
f = 1 MHz; see Figure 29
−3 dB Bandwidth 630 MHz typ R
L
= 50 Ω, C
L
= 5 pF; see Figure 30
Data Rate 1260 Mbps typ R
L
= 50 Ω, C
L
= 5 pF; see Figure 30
C
S
(Off ) 2.4 pF typ
C
D
, C
S
(On) 6.9 pF typ
POWER REQUIREMENTS V
DD
= 3.6 V
I
DD
0.006 µA typ Digital inputs = 0 V or 3.6 V
1 µA max
1
Guaranteed by design, not subject to production test.
ADG772 Data Sheet
Rev. C | Page 4 of 12
ABSOLUTE MAXIMUM RATINGS
T
A
= 25°C, unless otherwise noted.
Table 2.
Parameter Rating
V
DD
to GND −0.3 V to +4.6 V
Analog Inputs,
1
Digital Inputs −0.3 V to V
DD
+ 0.3 V or
10 mA, whichever occurs first
Peak Current, Pin S1A, Pin S2A,
Pin D1, or Pin D2
100 mA (pulsed at 1 ms, 10%
duty cycle max)
Continuous Current, Pin S1A,
Pin S2A, Pin D1, or Pin D2
30 mA
Operating Temperature
Industrial Range (B Version)
−40°C to +85°C
Storage Temperature Range −65°C to +150°C
Junction Temperature 150°C
θ
JA
Thermal Impedance
(4-Layer Board)
10-Lead Mini LFCSP 131.6°C/W
12-Lead LFCSP 61°C/W
Pb-Free Temperature,
Soldering, IR Reflow
Peak Temperature 260(+0/−5)°C
Time at Peak Temperature 10 sec to 40 sec
1
Overvoltages at the IN1, IN2, S1A, S2A, D1, or D2 pin are clamped by internal
diodes. Current must be limited to the maximum ratings given.
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
Only one absolute maximum rating can be applied at any
one time.
ESD CAUTION
Data Sheet ADG772
Rev. C | Page 5 of 12
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
7
8
3
2
5
IN2
6
V
DD
4
IN1
006692-002
10
9
1
GND
S
2A
S1A
S2B
D2
S1B
D1
ADG772
TOP VIEW
(Not to Scale)
Figure 2. 10-Lead Mini LFCSP Pin Configuration
06692-003
NOTES
1. NC = NO CONNECT.
2. THE EXPOSED PAD IS CONNECTED INTERNALLY.
FOR INCREASED RELIABILITY OF THE SOLDER
JOINTS AND MAXIMUM THERMAL CAPABILITY, IT
IS RECOMMENDED THAT THE PAD BE SOLDERED
TO A GROUND REFERENCE.
9
8
7
1
2
3
D2
S2BB
NC
D1
S1B
NC
4
IN1
5
IN2
6
VDD
12
S1A
11
GND
10
S2A
ADG772
TOP VIEW
(Not to Scale)
Figure 3. 12-Lead LFCSP Pin Configuration
Table 3. Pin Function Descriptions
Pin No.
Mnemonic Description
10-Lead Mini LFCSP 12-Lead LFCSP
1 12 S1A Source Terminal. Can be an input or an output.
2 1 D1 Drain Terminal. Can be an input or an output.
3 2 S1B Source Terminal. Can be an input or an output.
4 4 IN1 Logic Control Input. This pin controls Switch S1A and Switch S1B to D1.
5 5 IN2 Login Control Input. This pin controls Switch S2A and Switch S2B to D2.
6 6 VDD Most Positive Power Supply Potential.
7 8 S2B Source Terminal. Can be an input or an output.
8 9 D2 Drain Terminal. Can be an input or an output.
9 10 S2A Source Terminal. Can be an input or an output.
10 11 GND Ground (0 V) Reference.
Not applicable 3, 7 NC No Connect.
Not applicable 13 EPAD
Exposed Pad. The exposed pad is connected internally. For increased
reliability of the solder joints and maximum thermal capability, it is
recommended that the pad be soldered to a ground reference.
TRUTH TABLE
Table 4.
Logic (IN1 or IN2) Switch A (S1A or S2A) Switch B (S1B or S2B)
0 Off On
1 On Off
P1-P3P4-P6P7-P9P10-P12P13-P13

ADG772BCPZ-1REEL

Mfr. #:
Buy ADG772BCPZ-1REEL
Manufacturer:
Analog Devices Inc.
Description:
Multiplexer Switch ICs 6.7 Ohm 3.6V CMOS 2:1 Mux/DMux USB 2.0
Lifecycle:
New from this manufacturer.
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