IRFI4019H-117P

IRFI4019H-117P
4 www.irf.com
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig 9. Maximum Drain Current vs. Case Temperature
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
Fig 10. Threshold Voltage vs. Temperature
25 50 75 100 125 150
T
J
, Junction Temperature (°C)
0
2
4
6
8
10
I
D
,
D
r
a
i
n
C
u
r
r
e
n
t
(
A
)
0.00.51.01.5
V
SD
, Source-to-Drain Voltage (V)
0.1
1
10
100
I
S
D
,
R
e
v
e
r
s
e
D
r
a
i
n
C
u
r
r
e
n
t
(
A
)
T
J
= 25°C
T
J
= 150°C
V
GS
= 0V
-75 -50 -25 0 25 50 75 100 125 150
T
J
, Temperature ( °C )
2.0
3.0
4.0
5.0
V
G
S
(
t
h
)
G
a
t
e
t
h
r
e
s
h
o
l
d
V
o
l
t
a
g
e
(
V
)
I
D
= 50µA
1E-006 1E-005 0.0001 0.001 0.01 0.1 1 10
t
1
, Rectangular Pulse Duration (sec)
0.001
0.01
0.1
1
10
T
h
e
r
m
a
l
R
e
s
p
o
n
s
e
(
Z
t
h
J
C
)
0.20
0.10
D = 0.50
0.02
0.01
0.05
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
Ri (°C/W) τι (sec)
1.508254 0.000814
2.154008 0.111589
3.237738 2.2891
τ
J
τ
J
τ
1
τ
1
τ
2
τ
2
τ
3
τ
3
R
1
R
1
R
2
R
2
R
3
R
3
τ
τ
C
Ci= τi/Ri
Ci= τi/Ri
1 10 100 1000
V
DS
, Drain-toSource Voltage (V)
0.1
1
10
100
I
D
,
D
r
a
i
n
-
t
o
-
S
o
u
r
c
e
C
u
r
r
e
n
t
(
A
)
Tc = 25°C
Tj = 150°C
Single Pulse
1msec
10msec
OPERATION IN THIS AREA
LIMITED BY R
DS
(on)
100µsec
DC
IRFI4019H-117P
www.irf.com 5
Fig 13. Maximum Avalanche Energy Vs. Drain Current
Fig 12. On-Resistance Vs. Gate Voltage
4 5 6 7 8 9 10
V
GS
, Gate-to-Source Voltage (V)
0.0
0.1
0.2
0.3
0.4
0.5
R
D
S
(
o
n
)
,
D
r
a
i
n
-
t
o
-
S
o
u
r
c
e
O
n
R
e
s
i
s
t
a
n
c
e
(
)
T
J
= 25°C
T
J
= 125°C
I
D
= 5.2A
25 50 75 100 125 150
Starting T
J
, Junction Temperature (°C)
0
50
100
150
200
250
300
350
E
A
S
,
S
i
n
g
l
e
P
u
l
s
e
A
v
a
l
a
n
c
h
e
E
n
e
r
g
y
(
m
J
)
I
D
TOP
0.91A
1.1A
BOTTOM
5.2A
Fig 14. Diode Reverse Recovery Test Circuit for HEXFET
®
Power MOSFETs
Circuit Layout Considerations
Low Stray Inductance
Ground Plane
Low Leakage Inductance
Current Transformer
P.W.
Period
di/dt
Diode Recovery
dv/dt
Ripple 5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current
Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D =
P. W .
Period
*** V
GS
= 5V for Logic Level Devices
***
+
-
+
+
+
-
-
-
R
G
V
DD
dv/dt controlled by R
G
Driver same type as D.U.T.
I
SD
controlled by Duty Factor "D"
D.U.T. - Device Under Test
D.U.T
**
*
* Use P-Channel Driver for P-Channel Measurements
** Reverse Polarity for P-Channel
IRFI4019H-117P
6 www.irf.com
Fig 16a. Switching Time Test Circuit
Fig 16b. Switching Time Waveforms
V
GS
V
DS
90%
10%
t
d(on)
t
d(off)
t
r
t
f
Fig 15b. Unclamped Inductive Waveforms
Fig 15a. Unclamped Inductive Test Circuit
t
p
V
(BR)DSS
I
AS
R
G
I
AS
0.01
t
p
D.U.T
L
V
DS
+
-
V
DD
DRIVER
A
15V
20V
V
GS
Fig 17a. Gate Charge Test Circuit
Fig 17b Gate Charge Waveform
Vds
Vgs
Id
Vgs(th)
Qgs1
Qgs2 Qgd Qgodr
1K
VCC
DUT
0
L
S
V
DS
Pulse Width 1 µs
Duty Factor ≤ 0.1 %
R
D
V
GS
R
G
D.U.T.
10V
+
-
V
DD
20K

IRFI4019H-117P

Mfr. #:
Manufacturer:
Infineon Technologies
Description:
MOSFET 150V 2 x N-CH 8.7A for Digital Audio
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet