OMO ElectronicOMO Electronic
Expand menu
Hello, Sign inMy Account
0 Cart

ADIS16445BMLZ

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P23
Data Sheet ADIS16445
Rev. F | Page 3 of 22
SPECIFICATIONS
T
A
= 25°C, VDD = 3.3 V, angular rate = 0°/sec, dynamic range = ±250°/sec ± 1 g, unless otherwise noted.
Table 1.
Parameter Test Conditions/Comments Min Typ Max Unit
GYROSCOPES
Dynamic Range ±250 °/sec
Initial Sensitivity ±250°/sec, see Table 12 0.01 °/sec/LSB
±125°/sec 0.005 °/sec/LSB
±62°/sec 0.0025 °/sec/LSB
Repeatability
1
−40°C ≤ T
A
≤ +85°C 1 %
Sensitivity Temperature Coefficient
A
±40
ppm/°C
Misalignment Axis to axis ±0.05 Degrees
Axis to frame (package) ±0.5 Degrees
Nonlinearity Best fit straight line ±0.1 % of FS
Bias Repeatability
1, 2
−40°C ≤ T
A
≤ +85°C, 1 σ 0.5 °/sec
In-Run Bias Stability 1 σ, SMPL_PRD = 0x0001 12 °/hr
Angular Random Walk 1 σ, SMPL_PRD = 0x0001 0.56 °/√hr
Bias Temperature Coefficient −40°C ≤ T
A
≤ +85°C ±0.005 °/sec/°C
Linear Acceleration Effect on Bias Any axis, 1 σ ±0.015 °/sec/g
Bias Supply Sensitivity +3.15 V ≤ VDD ≤ +3.45 V ±0.2 °/sec/V
Output Noise ±250°/sec range, no filtering 0.22 °/sec rms
Rate Noise Density
0.011
°/sec/√Hz rms
−3 dB Bandwidth 330 Hz
Sensor Resonant Frequency 17.5 kHz
ACCELEROMETERS
Dynamic Range ±5
g
Initial Sensitivity See Table 16 for data format 0.2475 0.25 0.2525 mg/LSB
Repeatability
1
−40°C ≤ T
A
≤ +85°C 1 %
Sensitivity Temperature Coefficient −40°C ≤ T
A
≤ +85°C ±40 ppm/°C
Misalignment Axis to axis ±0.2 Degrees
Axis to frame (package) ±0.5 Degrees
Nonlinearity Best fit straight line ±0.2 % of FS
Bias Repeatability
1, 2
−40°C ≤ T
A
≤ +85°C, 1 σ ±8 mg
In-Run Bias Stability 1 σ, SMPL_PRD = 0x0001 0.075 mg
Velocity Random Walk 1 σ, SMPL_PRD = 0x0001 0.073 m/sec/√hr
Bias Temperature Coefficient
A
±0.04
m
g
/°C
Bias Supply Sensitivity +3.15 V ≤ VDD ≤ +3.45 V 1.5 mg/V
Output Noise No filtering 2.25 mg rms
Noise Density No filtering 0.105 mg/√Hz rms
−3 dB Bandwidth 330 Hz
Sensor Resonant Frequency 5.5 kHz
TEMPERATURE
Sensitivity See Table 17 0.07386 °C/LSB
LOGIC INPUTS
3
Input High Voltage, V
IH
2.0 V
Input Low Voltage, V
IL
0.8 V
Logic 1 Input Current, I
IH
V
IH
= 3.3 V ±0.2 ±10 µA
Logic 0 Input Current, I
IL
V
IL
= 0 V
All Pins Except
RST
40 60 µA
RST
Pin 1 mA
Input Capacitance, C
IN
10 pF
ADIS16445 Data Sheet
Rev. F | Page 4 of 22
Parameter Test Conditions/Comments Min Typ Max Unit
DIGITAL OUTPUTS
3
Output High Voltage, V
OH
I
SOURCE
= 1.6 mA 2.4 V
Output Low Voltage, V
OL
I
SINK
= 1.6 mA 0.4 V
FLASH MEMORY Endurance
4
10,000 Cycles
Data Retention
5
T
J
= 85°C 20 Years
FUNCTIONAL TIMES
6
Time until new data is available
Power-On Start-Up Time 175 ms
Reset Recovery Time
7
55 ms
Flash Memory Back-Up Time 55 ms
Flash Memory Test Time 20 ms
Automatic Self-Test Time
16
ms
CONVERSION RATE
xGYRO_OUT, xACCL_OUT SMPL_PRD = 0x0001 819.2 SPS
Clock Accuracy ±3 %
Sync Input Clock
8
0.8 1.1 kHz
POWER SUPPLY Operating voltage range, VDD 3.15 3.3 3.45 V
Power Supply Current VDD = 3.15 V 74 mA
1
The repeatability specifications represent analytical projections, which are based off of the following drift contributions and conditions: temperature hysteresis (−40°C
to +85°C), electronics drift (high-temperature operating life test: 85°C, 500 hours), drift from temperature cycling (JESD22, Method A104-C, Method N, 500 cycles,
−40°C to +85°C), rate random walk (10 year projection), and broadband noise.
2
Bias repeatability describes a long-term behavior, over a variety of conditions. Short-term repeatability is related to the in-run bias stability and noise density specifications.
3
The digital I/O signals are driven by an internal 3.3 V supply, and the inputs are 5 V tolerant.
4
Endurance is qualified as per JEDEC Standard 22, Method A117, and measured at −40°C, +25°C, +85°C, and +125°C.
5
The data retention lifetime equivalent is at a junction temperature (T
J
) of 85°C as per JEDEC Standard 22, Method A117. Data retention lifetime decreases with junction
temperature.
6
These times do not include thermal settling and internal filter response times (330 Hz bandwidth), which may affect overall accuracy.
7
The
RST
line must be held low for at least 10 μs to assure a proper reset and recovery sequence.
8
The sync input clock functions below the specified minimum value but at reduced performance levels.
Data Sheet ADIS16445
Rev. F | Page 5 of 22
TIMING SPECIFICATIONS
T
A
= 25°C, VDD = +3.3 V, unless otherwise noted.
Table 2.
Parameter Description
Normal Mode Burst Read
Unit Min
1
Typ Max Min
1
Typ Max
f
SCLK
Serial clock 0.01 2.0 0.01 1.0 MHz
t
STALL
Stall period between data 9 N/A
2
µs
t
READRATE
Read rate 40 µs
t
CS
Chip select to SCLK edge 48.8 48.8 ns
t
DAV
DOUT valid after SCLK edge 100 100 ns
t
DSU
DIN setup time before SCLK rising edge 24.4 24.4 ns
t
DHD
DIN hold time after SCLK rising edge 48.8 48.8 ns
t
SCLKR
, t
SCLKF
SCLK rise/fall times, not shown in timing diagrams 5 12.5 5 12.5 ns
t
DR
, t
DF
DOUT rise/fall times, not shown in timing diagrams 5 12.5 5 12.5 ns
t
SFS
CS
high after SCLK edge
5
5
ns
t
1
Input sync positive pulse width 25 25 µs
t
STDR
Input sync to data ready valid transition 670 670 µs
t
NV
Data invalid time 210 210 µs
t
3
Input sync period 910 910 µs
1
Guaranteed by design and characterization, but not tested in production.
2
When using the burst read mode, the stall period is not applicable.
Timing Diagrams
CS
SCLK
DOUT
DIN
1 2 3 4 5 6 15 16
R/W A5A6 A4 A3 A2
D2
MSB DB14
D1 LSB
DB13 DB12 DB10DB11 DB2 LSBDB1
t
CS
t
SFS
t
DAV
t
DHD
t
DSU
11051-002
Figure 2. SPI Timing and Sequence
CS
SCLK
t
READRATE
t
STALL
11051-003
Figure 3. Stall Time and Data Rate
CLOCK
DATA
READY
t
1
t
3
t
NV
t
STDR
11051-004
Figure 4. Input Clock Timing Diagram
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P23

ADIS16445BMLZ

Mfr. #:
Buy ADIS16445BMLZ
Manufacturer:
Analog Devices Inc.
Description:
IMU ACCEL/GYRO 3-AXIS SPI 20ML
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet