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74AUP3G0434DCH

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P23
74AUP3G0434 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 2 — 17 January 2013 9 of 22
NXP Semiconductors
74AUP3G0434
Low-power dual inverter and single buffer
11. Dynamic characteristics
Table 9. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 9.
Symbol Parameter Conditions 25 C 40 C to +125 C Unit
Min Typ
[1]
Max Min Max
(85 C)
Max
(125 C)
C
L
= 5 pF
t
pd
propagation delay nA to nY; see Figure 8
[2]
V
CC
= 0.8 V - 16.0 - - - - ns
V
CC
= 1.1 V to 1.3 V 2.4 5.0 10.3 2.0 11.4 12.6 ns
V
CC
= 1.4 V to 1.6 V 1.8 3.6 6.4 1.6 7.4 8.2 ns
V
CC
= 1.65 V to 1.95 V 1.5 2.9 5.0 1.4 5.9 6.5 ns
V
CC
= 2.3 V to 2.7 V 1.2 2.4 3.9 1.1 4.5 5.0 ns
V
CC
= 3.0 V to 3.6 V 1.1 2.1 3.2 1.0 3.9 4.3 ns
C
L
= 10 pF
t
pd
propagation delay nA to nY; see Figure 8
[2]
V
CC
= 0.8 V - 19.8 - - - - ns
V
CC
= 1.1 V to 1.3 V 2.8 5.9 12.2 2.3 13.7 15.1 ns
V
CC
= 1.4 V to 1.6 V 2.3 4.2 7.5 1.9 8.7 9.6 ns
V
CC
= 1.65 V to 1.95 V 2.0 3.5 5.9 1.7 7.0 7.7 ns
V
CC
= 2.3 V to 2.7 V 1.7 2.9 4.6 1.5 5.4 6.0 ns
V
CC
= 3.0 V to 3.6 V 1.6 2.7 3.8 1.4 4.5 5.1 ns
C
L
= 15 pF
t
pd
propagation delay nA to nY; see Figure 8
[2]
V
CC
= 0.8 V - 23.3 - - - - ns
V
CC
= 1.1 V to 1.3 V 3.2 6.7 13.0 2.6 15.8 17.4 ns
V
CC
= 1.4 V to 1.6 V 2.6 4.7 8.6 2.2 10.0 11.0 ns
V
CC
= 1.65 V to 1.95 V 2.3 4.0 6.7 2.0 8.0 8.8 ns
V
CC
= 2.3 V to 2.7 V 2.1 3.3 5.1 1.8 6.1 6.8 ns
V
CC
= 3.0 V to 3.6 V 2.0 3.1 4.2 1.6 5.0 5.5 ns
C
L
= 30 pF
t
pd
propagation delay nA to nY; see Figure 8
[2]
V
CC
= 0.8 V - 33.6 - - - - ns
V
CC
= 1.1 V to 1.3 V 4.4 8.9 16.3 3.6 19.0 20.9 ns
V
CC
= 1.4 V to 1.6 V 3.6 6.3 10.8 3.2 12.9 14.2 ns
V
CC
= 1.65 V to 1.95 V 3.2 5.3 9.0 2.9 10.5 11.6 ns
V
CC
= 2.3 V to 2.7 V 2.9 4.5 6.5 2.6 7.6 8.5 ns
V
CC
= 3.0 V to 3.6 V 2.9 4.2 5.6 2.5 6.2 7.2 ns
74AUP3G0434 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 2 — 17 January 2013 10 of 22
NXP Semiconductors
74AUP3G0434
Low-power dual inverter and single buffer
[1] All typical values are measured at nominal V
CC
.
[2] t
pd
is the same as t
PLH
and t
PHL
.
[3] All specified values are the average typical values over all stated loads.
[4] C
PD
is used to determine the dynamic power dissipation (P
D
in W).
P
D
=C
PD
V
CC
2
f
i
N+(C
L
V
CC
2
f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= load capacitance in pF;
V
CC
= supply voltage in V;
N = number of inputs switching;
(C
L
V
CC
2
f
o
) = sum of the outputs.
12. Waveforms
C
L
= 5 pF, 10 pF, 15 pF and 30 pF
C
PD
power dissipation
capacitance
f
i
= 1 MHz; V
I
= GND to V
CC
[3]
[4]
V
CC
= 0.8 V - 2.5 - - - - pF
V
CC
= 1.1 V to 1.3 V - 2.7 - - - - pF
V
CC
= 1.4 V to 1.6 V - 2.8 - - - - pF
V
CC
= 1.65 V to 1.95 V - 3.0 - - - - pF
V
CC
= 2.3 V to 2.7 V - 3.5 - - - - pF
V
CC
= 3.0 V to 3.6 V - 4.0 - - - - pF
Table 9. Dynamic characteristics
…continued
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 9.
Symbol Parameter Conditions 25 C 40 C to +125 C Unit
Min Typ
[1]
Max Min Max
(85 C)
Max
(125 C)
Measurement points are given in Table 10.
Logic levels: V
OL
and V
OH
are typical output voltage levels that occur with the output load.
Fig 8. The data input 1A to output 1Y, input 2A to output 2Y and input 3A to output 3Y propagation delays
DDD
W
3+/
W
3/+
9
0
9
0
9
0
9
0
*1'
9
,
9
2+
9
2/
*1'
9
,
9
2+
9
2/
$LQSXW
<RXWSXW
$$LQSXW
<<RXWSXW
9
0
9
0
9
0
9
0
W
3/+
W
3+/
Table 10. Measurement points
Supply voltage Output Input
V
CC
V
M
V
M
V
I
t
r
= t
f
0.8 V to 3.6 V 0.5V
CC
0.5V
CC
V
CC
3.0 ns
74AUP3G0434 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 2 — 17 January 2013 11 of 22
NXP Semiconductors
74AUP3G0434
Low-power dual inverter and single buffer
[1] For measuring enable and disable times, R
L
= 5 k.
For measuring propagation delays, setup and hold times, and pulse width, R
L
=1M.
Test data is given in Table 11
.
Definitions for test circuit:
R
L
= Load resistance.
C
L
= Load capacitance including jig and probe capacitance.
R
T
= Termination resistance should be equal to the output impedance Z
o
of the pulse generator.
V
EXT
= External voltage for measuring switching times.
Fig 9. Test circuit for measuring switching times
001aac521
DUT
R
T
V
I
V
O
V
EXT
V
CC
R
L
5 kΩ
C
L
G
Table 11. Test data
Supply voltage Load V
EXT
V
CC
C
L
R
L
[1]
t
PLH
, t
PHL
t
PZH
, t
PHZ
t
PZL
, t
PLZ
0.8 V to 3.6 V 5 pF, 10 pF, 15 pF, and 30 pF 5 k or 1 M open GND 2V
CC
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74AUP3G0434DCH

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Buy 74AUP3G0434DCH
Manufacturer:
Nexperia
Description:
Inverters 74AUP3G0434DC/VSSOP8/REEL 7" Q
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New from this manufacturer.
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