MAX1177
Reading the Conversion Result
EOC is provided to flag the µP when a conversion is
complete. The falling edge of EOC signals that the data is
valid and ready to be output to the bus. D0–D15 are the
parallel outputs of the MAX1177. These tri-state outputs
allow for direct connection to a microcontroller I/O bus.
The outputs remain high impedance during acquisition
and conversion. Data is loaded onto the output bus with
the third falling edge of CS with R/C high (after t
DO
).
Bringing CS high forces the output bus back to high
impedance. The MAX1177 then waits for the next falling
edge of CS to start the next conversion cycle (Figure 2).
HBEN toggles the output between the high/low byte. The
low byte is loaded onto the output bus when HBEN is
low, and the high byte is on the bus when HBEN is high.
Transfer Function
Figure 8 shows the MAX1177 output transfer function.
The output is coded in standard binary.
Input Buffer
Most applications require an input buffer amplifier to
achieve 16-bit accuracy and prevent loading the
source. When the input signal is multiplexed, switch the
channels immediately after acquisition, rather than near
the end of, or after, a conversion. This allows more time
for the input buffer amplifier to respond to a large step
change in input signal. The input amplifier must have a
high enough slew rate to complete the required output
voltage change before the beginning of the acquisition
time. Figure 9 shows an example of this circuit using
the MAX427.
Layout, Grounding, and Bypassing
For best performance, use printed circuit boards. Do
not run analog and digital lines parallel to each other,
and do not lay out digital signal paths underneath the
ADC package. Use separate analog and digital ground
planes with only one point connecting the two ground
systems (analog and digital) as close to the device as
possible.
Route digital signals far away from sensitive analog and
reference inputs. If digital lines must cross analog lines,
do so at right angles to minimize coupling digital noise
onto the analog lines. If the analog and digital sections
share the same supply, isolate the digital and analog
supply by connecting them with a low-value (10Ω)
resistor or ferrite bead.
The ADC is sensitive to high-frequency noise on the
AV
DD
supply. Bypass AV
DD
to AGND with a 0.1µF
capacitor in parallel with a 1µF to 10µF low-ESR capaci-
tor with the smallest capacitor closest to the device.
Keep capacitor leads short to minimize stray inductance.
16-Bit, 135ksps, Single-Supply ADC
with to 10V Input Range
10 ______________________________________________________________________________________
