MAX7319
changes. An input change sets one of eight flag bits
that identify changed input(s). All flags are cleared
upon a subsequent read or write transaction to the
MAX7319.
A latching interrupt output, INT, is programmed to flag
input data changes on input ports through an interrupt
mask register. By default, data changes on any input
port force INT to a logic-low. The interrupt output, INT,
and all transition flags are cleared when the MAX7319
is next accessed through the serial interface.
Internal pullup resistors to V+ are selected by the
address-select inputs, AD0 and AD2. Pullups are
enabled on the input ports in groups of four (see Table 3).
Initial Power-Up
On power-up, the transition detection logic is reset, and
INT is released to a high-impedance state. The inter-
rupt mask register is set to 0xFF, enabling the interrupt
output for transitions on all eight input ports. The transi-
tion flags are cleared to indicate no data changes.
RST Input
The RST input voids any I
2
C transaction involving the
MAX7319, forcing the MAX7319 into the I
2
C STOP con-
dition. A reset does not affect the interrupt output (INT)
or change the contents of the interrupt mask register.
RST is overvoltage tolerant to +6V.
Standby Mode
When the serial interface is idle, the MAX7319 automat-
ically enters standby mode, drawing minimal supply
current.
Slave Address and Input Pullup Selection
Address inputs AD0 and AD2 determine the MAX7319
slave address and select which inputs have pullup
resistors. Pullups are enabled on the input ports in
groups of four (see Table 3). The MAX7319, MAX7321,
MAX7322, and MAX7323 use a different range of slave
addresses (110xxxx) than the MAX7320 (101xxxx).
The MAX7319 slave address is determined on each I
2
C
transmission, regardless of whether the transmission is
actually addressing the MAX7319. The MAX7319 distin-
guishes whether address inputs AD2 and AD0 are con-
nected to SDA or SCL instead of fixed logic levels V+
or GND during this transmission. This means that the
MAX7319 slave address can be configured dynamically
in the application without cycling the device supply.
On initial power-up, the MAX7319 cannot decode the
address inputs AD2 and AD0 fully until the first I
2
C
transmission. AD0 and AD2 initially appear to be con-
nected to V+ or GND. This is important because the
address selection determines which inputs have
pullups applied. However, at power-up, the I
2
C SDA
and SCL bus interface lines are high impedance at the
pins of every device (master or slave) connected to the
bus, including the MAX7319. This is guaranteed as part
I
2
C Port Expander with Eight Inputs and
Maskable Transition Detection
6 _______________________________________________________________________________________
detection interrupt and selectable pullups.
default levels.
detection interrupt and pullups on all ports.
All ports power up as inputs (or logic-high outputs).
open-drain output to logic-high.
