High Voltage Latch-Up Proof,
Dual SPDT Switches
Data Sheet
ADG5436
Rev. B Document Feedback
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FEATURES
Latch-up proof
8 kV HBM ESD rating
Low on resistance (<10 Ω)
±9 V to ±22 V dual-supply operation
9 V to 40 V single-supply operation
48 V supply maximum ratings
Fully specified at ±15 V, ±20 V, +12 V, and +36 V
V
SS
to V
DD
analog signal range
APPLICATIONS
Relay replacement
Automatic test equipment
Data acquisition
Instrumentation
Avionics
Audio and video switching
Communication systems
FUNCTIONAL BLOCK DIAGRAMS
ADG5436
S1A
S1B
IN1
S2A
S2B
IN2
D1
D2
SWITCHES SHOWN FOR A LOGIC 1 INPUT.
09204-001
Figure 1. TSSOP Package
ADG5436
S2A
D2
S2B
S1A
D1
S1B
IN2 ENIN1
LOGIC
09204-002
SWITCHES SHOWN FOR A LOGIC 1 INPUT.
Figure 2. LFCSP Package
GENERAL DESCRIPTION
The ADG5436 is a monolithic CMOS device containing two
independently selectable single-pole/double-throw (SPDT)
switches. An EN input on the LFCSP package enables or disables
the device. When disabled, all channels switch off. Each switch
conducts equally well in both directions when on and has an
input signal range that extends to the supplies. In the off condition,
signal levels up to the supplies are blocked. Both switches exhibit
break-before-make switching action for use in multiplexer
applications.
The on-resistance profile is very flat over the full analog input
range, ensuring excellent linearity and low distortion when
switching audio signals.
PRODUCT HIGHLIGHTS
1. Trench isolation guards against latch-up. A dielectric trench
separates the P and N channel transistors thereby preventing
latch-up even under severe overvoltage conditions.
2. Low R
ON
.
3. Dual-supply operation. For applications where the analog
signal is bipolar, the ADG5436 can be operated from dual
supplies up to ±22 V.
4. Single-supply operation. For applications where the analog
signal is unipolar, the ADG5436 can be operated from a
single-rail power supply up to 40 V.
5. 3 V logic compatible digital inputs: V
INH
= 2.0 V, V
INL
= 0.8 V.
6. No V
L
logic power supply required.
