APPLICATIONS
INFORMATION
The above is a partial application circuit for the ZNBG
series showing all external components required for
appropriate biasing. The bias circuits are
unconditionally stable over the full temperature
range with the associated FETs and gate and drain
capacitors in circuit.
Capacitors C
D
and C
G
ensure that residual power
supply and substrate generator noise is not allowed
to affect other external circuits which may be
sensitive to RF interference. They also serve to
suppress any potential RF feedthrough between
stages via the ZNBG device. These capacitors are
required for all stages used. Values of 10nF and 4.7nF
respectively are recommended however this is
design dependent and any value between 1nF and
100nF could be used.
The capacitors C
NB
and C
SUB
are an integral part of
the ZNBGs negative supply generator. The negative
bias voltage is generated on-chip using an internal
oscillator. The required value of capacitors C
NB
and
C
SUB
is 47nF. This generator produces a low current
supply of approximately -3 volts. Although this
generator is intended purely to bias the external
FETs, it can be used to power other external circuits
via the C
SUB
pin.
Resistor R
CAL1
sets the drain current at which all
external FETs are operated. If any bias control circuit
is not required, its related drain and gate connections
may be left open circuit without affecting the
operation of the remaining bias circuits. If all FETs
associated with a current setting resistor are omitted,
the particular R
CAL
should still be included. The
supply current can be reduced, if required, by using a
high value R
CAL
resistor (e.g. 470k).
The ZNBG devices have been designed to protect the
external FETs from adverse operating conditions.
With a JFET connected to any bias circuit, the gate
output voltage of the bias circuit can not exceed the
range -3.5V to 0.7V, under any conditions including
powerup and powerdown transients. Should the
negative bias generator be shorted or overloaded so
that the drain current of the external FETs can no
longer be controlled, the drain supply to FETs is shut
down to avoid damage to the FETs by excessive
drain current.
The following diagram show the ZNBG2000/1 in
typical LNB applications.
ISSUE 1 - AUGUST 2001
ZNBG2000
ZNBG2001
5
16k
TYPICAL APPLICATION CIRCUIT
8
