NCP5424
http://onsemi.com
4
ELECTRICAL CHARACTERISTICS (0°C < T
A
< 70°C; 0°C < T
J
< 125°C; R
OSC
= 30.9 k, C
COMP1,2
= 0.1 F,
10.8
V < V
CC
< 13.2 V; 10.8 V < BST < 20 V, C
GATE(H)1,2
= C
GATE(L)1,2
= 1.0 nF, V
FB+2
= 1.0 V; unless otherwise specified.)
Characteristic
Test Conditions Min Typ Max Unit
Error Amplifier
V
FB
Bias Current V
FBX
= 0 V − 0.5 1.6 A
V
FB1(2)
Input Range Note 2 0 − 1.1 V
COMP1,2 Source Current COMP1,2 = 1.2 V to 2.5 V; V
FB1(−2)
= 0.8 V 15 30 60 A
COMP1,2 Sink Current COMP1,2 = 1.2 V; V
FB1(−2)
= 1.2 V 15 30 60 A
Reference Voltage 1(2) COMP1 = V
FB1
; COMP2 = V
FB−2
0.980 1.000 1.020 V
COMP1,2 Max Voltage V
FB1(−2)
= 0.8 V 3.0 3.3 − V
COMP1,2 Min Voltage V
FB1(−2)
= 1.2 V − 0.25 0.35 V
Open Loop Gain − − 95 − dB
Unity Gain Band Width − − 40 − kHz
PSRR @ 1.0 kHz − − 70 − dB
Transconductance − − 32 − mmho
Output Impedance − − 2.5 − M
Input Offset, Error Amp. 2 − −3.0 0 3.0 mV
Error Amp. 2 Common Mode Range Note 2 1.75 2.0 − V
GATE(H) and GATE(L)
High Voltage (AC)
Measure: V
CC
− GATE(L)1,2;
BST − GATE(H)1,2; Note 2
− 0 0.5 V
Low Voltage (AC) Measure:GATE(L)1,2 or GATE(H)1,2; Note 2 − 0 0.5 V
Rise Time 1.0 V < GATE(L)1,2 < V
CC
− 1.0 V
1.0 V < GATE(H)1,2 < BST − 1.0 V,
BST ≤ 14 V
− 20 50 ns
Fall Time V
CC
− 1.0 > GATE(L)1,2 > 1.0 V
BST − 1.0 > GATE(H)1,2 > 1.0 V,
BST ≤ 14 V
− 15 50 ns
GATE(H) to GATE(L) Delay GATE(H)1,2 < 2.0 V, GATE(L)1,2 > 2.0 V
BST ≤ 14 V
20 40 70 ns
GATE(L) to GATE(H) Delay GATE(L)1,2 < 2.0 V, GATE(H)1,2 > 2.0 V;
BST ≤ 14 V
20 40 70 ns
GATE(H)1(2) and GATE(L)1(2)
pull−down.
Resistance to GND
Note 2
50 125 280 k
PWM Comparator
PWM Comparator Offset
V
FB1(−2)
= 0 V; Increase COMP1,2 until
GATE(H)1,2 starts switching
0.30 0.40 0.50 V
Artificial Ramp Duty cycle = 50%, Note 2 60 105 150 mV
Minimum Pulse Width Note 2 − − 300 ns
2. Guaranteed by design, not 100% tested in production.
