LTC2365/LTC2366
19
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applications inForMation
Figure 18. RC Input Filter
Input Filtering and Source Impedance
The noise and the distortion of the input amplifier and other
circuitry must be considered since they will add to the
LTC2365/LTC2366 noise and distortion. The small-signal
bandwidth of the sample-and-hold circuit is 50MHz. Any
noise or distortion products that are present at the analog
inputs will be summed over this entire bandwidth. Noisy
input circuitry should be filtered prior to the analog inputs
to minimize noise. A simple 1-pole RC filter is sufficient for
many applications. For example, Figure 18 shows a 47pF
capacitor from A
IN
to ground and a 51source resistor to
limit the input bandwidth to 47MHz. The 47pF capacitor also
acts as a charge reservoir for the input sample-and-hold
and isolates the ADC input from sampling-glitch sensitive
circuitry. High quality capacitors and resistors should be
used since these components can add distortion. NPO
and silver mica type dielectric capacitors have excellent
linearity. Carbon surface mount resistors can generate
distortion from self heating and from damage that may
occur during soldering. Metal film surface mount resistors
are much less susceptible to both problems. When high
amplitude unwanted signals are close in frequency to the
desired signal frequency, a multiple pole filter is required.
High external source resistance, combined with the 20pF of
input capacitance, will reduce the rated 50MHz bandwidth
and increase acquisition time beyond 56ns.
Reference Input
On the TS8 package of the LTC2365/LTC2366, the voltage
on the V
REF
pin defines the full-scale range of the ADC.
The reference voltage can range from V
DD
down to 1.4V.
Input Range
The analog input of the LTC2365/LTC2366 is driven
single-ended with respect to GND from a single supply.
The input may swing up to V
DD
for the S6 package and
to V
REF
for the TS8 package. The 0V to 2.5V range is also
ideally suited for single-ended input use with V
DD
or V
REF
= 2.5V for single supply applications. If the difference
between the A
IN
input and GND exceeds V
DD
for the S6
package or V
REF
for the TS8 package, the output code will
stay fixed at all ones, and if this difference goes below 0V,
the output code will stay fixed at all zeros.
Figure 19 shows the ideal input/output characteristics for
the LTC2365/LTC2366. The code transitions occur mid-
way between successive integer LSB values (i.e. 0.5LSB,
1.5LSB, 2.5LSB, …, FS –1.5LSB). The output code is
straight binary with 1LSB = V
DD
/4096 for the S6 package
and 1LSB = V
REF
/4096 for the TS8 package.
V
DD
GND
LTC2366
23656 F18
10µF
47pF
51Ω
6
5
4
1
2
3
CS
SD0
SCK
A
IN
Figure 19. LTC2365/LTC2366 Transfer Characteristics
INPUT VOLTAGE (V)
UNIPOLAR OUTPUT CODE
23656 F19
111...111
111...110
000...000
000...001
FS – 1LSB1LSB0
LTC2365/LTC2366
20
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applications inForMation
BOARD LAYOUT AND BYPASSING
Wire wrap boards are not recommended for high resolu-
tion and/or high speed A/D converters. To obtain the best
performance from the LTC2365/LTC2366, a printed circuit
board with ground plane is required. Layout for the printed
circuit board should ensure that digital and analog signal
lines are separated as much as possible. In particular, care
should be taken not to run any digital track alongside an
analog signal track or underneath the ADC. The analog
input should be screened by the ground plane.
High quality tantalum and ceramic bypass capacitors
should be used at the V
DD
and V
REF
pins as shown in the
Typical Application circuit on the first page of this data
sheet. For optimum performance, a 10µF surface mount
AVX capacitor with a 0.1µF ceramic is recommended for
the V
DD
pin and a 4.7µF surface mount AVX capacitor
with a 0.1µF ceramic is recommended for the V
REF
and
OV
DD
pins. Alternatively, 4.7µF and 10µF ceramic chip
capacitors such as Murata GRM235Y5V106Z016 may
be used. The capacitors must be located as close to the
pins as possible. The traces connecting the pins and the
bypass capacitors must be kept short and should be made
as wide as possible.
Figure 20 shows the recommended system ground con-
nections. All analog circuitry grounds should be terminated
at the LTC2365/LTC2366. The ground return from the
LTC2365/LTC2366 to the power supply should be low
impedance for noise free operation. Digital circuitry
grounds must be connected to the digital supply
common.
In applications where the ADC data outputs and control
signals are connected to a continuously active micropro-
cessor bus, it is possible to get errors in the conversion
results. These errors are due to feedthrough from the
microprocessor to the successive approximation com-
parator. The problem can be eliminated by forcing the
microprocessor into a Wait state during conversion or
by using three-state buffers to isolate the ADC data bus.
Figure 20. Power Supply Ground Practice
23656 F20
GND
A
IN
V
DD
CA
IN
CS
SDO
SCK
CV
DD
PIN 1
VIAS TO GROUND PLANE
+
10µF
LTC2365/LTC2366
21
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For more information www.linear.com/LTC2365
package Description
package Description
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
1.50 – 1.75
(NOTE 4)
2.80 BSC
0.30 – 0.45
6 PLCS (NOTE 3)
DATUM ‘A’
0.09 – 0.20
(NOTE 3)
S6 TSOT-23 0302
2.90 BSC
(NOTE 4)
0.95 BSC
1.90 BSC
0.80 – 0.90
1.00 MAX
0.01 – 0.10
0.20 BSC
0.30 – 0.50 REF
PIN ONE ID
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. JEDEC PACKAGE REFERENCE IS MO-193
3.85 MAX
0.62
MAX
0.95
REF
RECOMMENDED SOLDER PAD LAYOUT
PER IPC CALCULATOR
1.4 MIN
2.62 REF
1.22 REF
S6 Package
6-Lead Plastic TSOT-23
(Reference LTC DWG # 05-08-1636)

LTC2365CTS8#TRPBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Analog to Digital Converters - ADC 1Msps, 12-B Serial Smpl ADCs in TSOT
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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