CYK256K16SCBU-70BVXI

4-Mbit (256K x 16) Pseudo Static RAM
CYK256K16SCCB
Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600
Document #: 38-05526 Rev. *H Revised October 18, 2006
Features
Advanced low-power MoBL
®
architecture
High speed: 55 ns, 60 ns and 70 ns
Wide voltage range: 2.7V to 3.3V
Typical active current: 1 mA @ f = 1 MHz
Low standby power
Automatic power-down when deselected
Functional Description
[1]
The CYK256K16SCCB is a high-performance CMOS pseudo
static RAM (PSRAM) organized as 256K words by 16 bits that
supports an asynchronous memory interface. This device
features advanced circuit design to provide ultra-low active
current. This is ideal for providing More Battery Life (MoBL)
in portable applications such as cellular telephones. The
device can be put into standby mode reducing power
consumption dramatically when deselected (CE
1
LOW, CE
2
HIGH or both BHE and BLE are HIGH). The input/output pins
(I/O
0
through I/O
15
) are placed in a high-impedance state
when: deselected (CE
1
HIGH, CE
2
LOW, OE is deasserted
HIGH), or during a write operation (Chip Enabled and Write
Enable WE LOW).
Reading from the device is accomplished by asserting the
Chip Enables (CE
1
LOW and CE
2
HIGH) and Output Enable
(OE
) LOW while forcing the Write Enable (WE) HIGH. If Byte
Low Enable (BLE
) is LOW, then data from the memory location
specified by the address pins A
0
through A
17
will appear on
I/O
0
to I/O
7
. If Byte High Enable (BHE) is LOW, then data from
memory will appear on I/O
8
to I/O
15
. See the Truth Table for a
complete description of read and write modes.
Note:
1. For best-practice recommendations, please refer to the Cypress application note “System Design Guidelines” on http://www.cypress.com.
256K x 16
RAM Array
I/O
0
–I/O
7
COLUMN DECODER
SENSE AMPS
DATA IN DRIVERS
OE
I/O
8
–I/O
15
WE
BLE
BHE
ROW DECODER
Power -Down
Circuit
BHE
BLE
A
10
A
11
A
12
A
13
A
14
A
15
A
16
A
9
A
8
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
CE
2
CE
1
CE
2
CE
1
Logic Block Diagram
A
17
[+] Feedback
CYK256K16SCCB
Document #: 38-05526 Rev. *H Page 2 of 10
Pin Configuration
[3, 4, 5]
Product Portfolio
Product
V
CC
Range
(V)
Speed
(ns)
Power Dissipation
Operating, I
CC
(mA)
Standby, I
SB2
(µA)f = 1 MHz f = f
MAX
Min. Typ. Max. Typ.
[2]
Max. Typ.
[2]
Max. Typ.
[2]
Max.
CYK256K16SCCB 2.7 3.0 3.3 55 1 5 14 22 17 40
60
70 8 15
Notes:
2. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at V
CC
= V
CC
(typ) and T
A
= 25°C.
3. Ball H1, G2, H6 are the address expansion pins for the 8-Mb, 16-Mb, and 32-Mb densities, respectively.
4. NC “no connect”—not connected internally to the die.
5. DNU (Do Not Use) pins have to be left floating or tied to V
SS
to ensure proper application.
WE
A
11
A
10
A
6
A
0
A
3
CE
1
I/O
10
I/O
8
I/O
9
A
4
A
5
I/O
11
I/O
13
I/O
12
I/O
14
I/O
15
V
SS
A
9
A
8
OE
V
SS
A
7
I/O
0
BHE
CE
2
A
17
A
2
A
1
BLE
V
CC
I/O
2
I/O
1
I/O
3
I/O
4
I/O
5
I/O
6
I/O
7
A
15
A
14
A
13
A
12
NC
NC
NC
3
2
6
5
4
1
D
E
B
A
C
F
G
H
A
16
DNU
V
CC
48-ball VFBGA
Top View
[+] Feedback
CYK256K16SCCB
Document #: 38-05526 Rev. *H Page 3 of 10
Maximum Ratings
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Storage Temperature .................................–65°C to +150°C
Ambient Temperature with
Power Applied ..............................................–40°C to +85°C
Supply Voltage to Ground Potential ................ 0.4V to 4.6V
DC Voltage Applied to Outputs
in High-Z State
[6, 7, 8]
....................................... 0.4V to 3.7V
DC Input Voltage
[6, 7, 8]
....................................0.4V to 3.7V
Output Current into Outputs (LOW) ............................20 mA
Static Discharge Voltage ......................................... > 2001V
(per MIL-STD-883, Method 3015)
Latch-up Current ....................................................> 200 mA
Operating Range
Range Ambient Temperature (T
A
)V
CC
Industrial 25°C to +85°C 2.7V to 3.3V
DC Electrical Characteristics (Over the Operating Range)
Parameter Description Test Conditions
CYK256K16SCCB -55, 60, 70
UnitMin. Typ.
[2]
Max.
V
CC
Supply Voltage 2.7 3.0 3.3 V
V
OH
Output HIGH Voltage I
OH
= 0.1 mA V
CC
– 0.4 V
V
OL
Output LOW Voltage I
OL
= 0.1 mA 0.4 V
V
IH
Input HIGH Voltage 0.8 * V
CC
V
CC
+ 0.4 V
V
IL
Input LOW Voltage F = 0 0.4 0.62 V
I
IX
Input Leakage
Current
GND < V
IN
< Vcc 1+1µA
I
OZ
Output Leakage
Current
GND < V
OUT
< Vcc, Output
Disabled
1+1µA
I
CC
V
CC
Operating
Supply Current
f = f
MAX
= 1/t
RC
V
CC
= 3.3V,
I
OUT
= 0 mA,
CMOS level
14 for –55
14 for –60
8 for –70
22 for –55
22 for –60
15 for –70
mA
f = 1 MHz 1 for all speeds 5 for all speeds
I
SB1
Automatic CE
1
Power-down Current
—CMOS Inputs
CE
> V
CC
0.2V, CE
2
< 0.2V
V
IN
> V
CC
0.2V, V
IN
< 0.2V,
f = f
MAX
(Address and Data Only),
f = 0 (OE
, WE, BHE and BLE)
150 250 µA
I
SB2
Automatic CE
1
Power-down Current
—CMOS Inputs
CE > V
CC
0.2V, CE
2
< 0.2V
V
IN
> V
CC
0.2V or V
IN
< 0.2V,
f = 0, V
CC
= 3.3V
17 40 µA
Capacitance
[9]
Parameter Description Test Conditions Max. Unit
C
IN
Input Capacitance T
A
= 25°C, f = 1 MHz
V
CC
= V
CC(typ)
8pF
C
OUT
Output Capacitance 8 pF
Thermal Resistance
[9]
Parameter Description Test Conditions VFBGA Unit
θ
JA
Thermal Resistance (Junction to Ambient) Test conditions follow standard test methods and
procedures for measuring thermal impedance,
per EIA/JESD51.
55 °C/W
θ
JC
Thermal Resistance (Junction to Case) 17 °C/W
Notes:
6. V
IH(MAX)
= V
CC
+ 0.5V for pulse durations less than 20 ns.
7. V
IL(MIN)
= –0.5V for pulse durations less than 20 ns.
8. Overshoot and undershoot specifications are characterized and are not 100% tested.
9. Tested initially and after design or process changes that may affect these parameters.
[+] Feedback

CYK256K16SCBU-70BVXI

Mfr. #:
Manufacturer:
Cypress Semiconductor
Description:
IC PSRAM 4M PARALLEL 48VFBGA
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet