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IS61C1024-15JI

P1-P3P4-P6P7-P9P10-P11
IS61C1024
IS61C1024L
4
Integrated Silicon Solution, Inc. — 1-800-379-4774
SR028-1J
11/03/98
ISSI
®
IS61C1024 POWER SUPPLY CHARACTERISTICS
(1)
(Over Operating Range)
-12 ns -15 ns -20 ns -25 ns
Symbol Parameter Test Conditions Min. Max. Min. Max. Min. Max. Min. Max. Unit
ICC1 Vcc Operating VCC = VCC MAX., = VIL Com. — 85 — 85 — 85 — 85 mA
Supply Current IOUT = 0 mA, f = 0 Ind. — 110 — 110 — 110 — 110
ICC2 Vcc Dynamic Operating VCC = VCC MAX., = VIL Com. — 170 — 160 — 150 — 140 mA
Supply Current IOUT = 0 mA, f = fMAX Ind. — 180 — 170 — 160 — 150
ISB1 TTL Standby Current VCC = VCC MAX., Com. — 40 — 40 — 40 — 40 mA
(TTL Inputs) VIN = VIH or VIL Ind. — 60 — 60 — 60 — 60
≥ VIH, f = 0 or
CE2 ≤ VIL, f = 0
ISB2 CMOS Standby VCC = VCC MAX., Com. — 30 — 30 — 30 — 30 mA
Current (CMOS Inputs) ≤ VCC – 0.2V, Ind. — 40 — 40 — 40 — 40
CE2 ≤ 0.2V
VIN > VCC – 0.2V, or
VIN ≤ 0.2V, f = 0
Note:
1. At f = f
MAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
IS61C1024L POWER SUPPLY CHARACTERISTICS
(1)
(Over Operating Range)
-15 ns -20 ns -25 ns
Symbol Parameter Test Conditions Min. Max. Min. Max. Min. Max. Unit
ICC1 Vcc Operating VCC = VCC MAX., = VIL Com. — 85 — 85 — 85 mA
Supply Current IOUT = 0 mA, f = 0 Ind. — 110 — 110 — 110
ICC2 Vcc Dynamic Operating VCC = VCC MAX., = VIL Com. — 160 — 150 — 140 mA
Supply Current IOUT = 0 mA, f = fMAX Ind. — 170 — 160 — 150
ISB1 TTL Standby Current VCC = VCC MAX, Com. — 40 — 40 — 40 mA
(TTL Inputs) VIN = VIH or VIL Ind. — 60 — 60 — 60
≥ VIH, f = 0 or
CE2 ≤ VIL, f = 0
ISB2 CMOS Standby VCC = VCC MAX., Com. — 500 — 500 — 500 µA
Current (CMOS Inputs) ≤ VCC – 0.2V, Ind. — 750 — 750 — 750
CE2 ≤ 0.2V
VIN > VCC – 0.2V, or
VIN ≤ 0.2V, f = 0
Note:
1. At f = f
MAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
IS61C1024
IS61C1024L
Integrated Silicon Solution, Inc. — 1-800-379-4774
5
SR028-1K
05/12/99
ISSI
®
READ CYCLE SWITCHING CHARACTERISTICS
(1)
(Over Operating Range)
-12
(2)
-15 ns -20 ns -25 ns
Symbol Parameter Min. Max. Min. Max. Min. Max. Min. Max. Unit
tRC Read Cycle Time 12 — 15 — 20 — 25 — ns
tAA Address Access Time — 12 — 15 — 20 — 25 ns
tOHA Output Hold Time 3 — 3 — 3 — 3 — ns
tACE1 Access Time — 12 — 15 — 20 — 25 ns
tACE2 CE2 Access Time — 12 — 15 — 20 — 25 ns
tDOE Access Time — 6 — 7 — 9 — 9 ns
tLZOE
(3)
to Low-Z Output 0 — 0 — 0 — 0 — ns
tHZOE
(3)
to High-Z Output 0 6 0 6 0 7 0 10 ns
tLZCE1
(3)
to Low-Z Output 2 — 2 — 3 — 3 — ns
tLZCE2
(3)
CE2 to Low-Z Output 2 — 2 — 3 — 3 — ns
tHZCE
(3)
or CE2 to High-Z Output 0 7 0 8 0 9 0 10 ns
tPU
(4)
or CE2 to Power-Up 0 — 0 — 0 — 0 — ns
tPD
(4)
or CE2 to Power-Down — 12 — 12 — 18 — 20 ns
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V
and output loading specified in Figure 1.
2. -12 ns device for IS61C1024 only.
3. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
4. Not 100% tested.
AC TEST CONDITIONS
Parameter Unit
Input Pulse Level 0V to 3.0V
Input Rise and Fall Times 3 ns
Input and Output Timing 1.5V
and Reference Level
Output Load See Figures 1 and 2
AC TEST LOADS
Figure 1 Figure 2
480 Ω
5 pF
Including
jig and
scope
255 Ω
OUTPUT
5V
480 Ω
30 pF
Including
jig and
scope
255 Ω
OUTPUT
5V
IS61C1024
IS61C1024L
6
Integrated Silicon Solution, Inc. — 1-800-379-4774
SR028-1J
11/03/98
ISSI
®
DATA VALID
READ1.eps
PREVIOUS DATA VALID
t
AA
t
OHA
t
OHA
t
RC
D
OUT
ADDRESS
t
RC
t
OHA
t
AA
t
DOE
t
LZOE
t
ACE1
t
ACE2
t
LZCE1
t
LZCE2
t
HZOE
HIGH-Z
DATA VALID
ADDRESS
OE
CE1
CE2
D
OUT
t
HZCE1
t
HZCE2
CE2_RD2.eps
Notes:
1. is HIGH for a Read Cycle.
2. The device is continuously selected. , = V
IL, CE2 = VIH.
3. Address is valid prior to or coincident with LOW and CE2 HIGH transitions.
READ CYCLE NO. 2
(1,3)
AC WAVEFORMS
READ CYCLE NO. 1
(1,2)
P1-P3P4-P6P7-P9P10-P11

IS61C1024-15JI

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IC SRAM 1M PARALLEL 32SOJ
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