NTMFS4120NT3G

NTMFS4120N
http://onsemi.com
4
TYPICAL PERFORMANCE CURVES
Figure 7. Capacitance Variation Figure 8. GateToSource and
DrainToSource Voltage vs. Total Charge
1.0
5
0
V
SD
, SOURCETODRAIN VOLTAGE (VOLTS)
Figure 9. Resistive Switching Time
Variation vs. Gate Resistance
I
S
, SOURCE CURRENT (AMPS)
V
GS
= 0 V
T
J
= 25°C
45
25
Figure 10. Diode Forward Voltage vs. Current
0.80.6
20
15
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
0.1
V
DS
, DRAINTOSOURCE VOLTAGE (VOLTS)
0.1
1
I
D
, DRAIN CURRENT (AMPS)
R
DS(on)
LIMIT
THERMAL LIMIT
PACKAGE LIMIT
V
GS
= 20 V
SINGLE PULSE
T
C
= 25°C
10
0.01
dc
1
100
10
10 ms
1 ms
100 ms
GATETOSOURCE OR DRAINTOSOURCE VOLTAGE (VOLTS)
R
G
, GATE RESISTANCE (OHMS)
1 10 100
100
10
t, TIME (ns)
V
DD
= 15 V
I
D
= 1 A
V
GS
= 4.5 V
t
d(on)
1000
t
f
t
d(off)
10
1000
10 ms
30
150
50
0
T
J
, JUNCTION TEMPERATURE (°C)
I
D
= 30 A
500
250
Figure 12. Maximum Avalanche Energy vs
Starting Junction Temperature
7550
200
150
100
25
300
EAS, SINGLE PULSE DRAINTOSOURCE
AVALANCHE ENERGY (mJ)
100 125
V
GS
, GATE-TO-SOURCE VOLTAGE (VOLTS)
0
3
0
Q
G
, TOTAL GATE CHARGE (nC)
5
4
51015
V
DD
= 15 V
V
GS
= 4.5 V
I
D
= 24 A
T
J
= 25°C
V
GS
Q
GS
35
Q
GD
QT
2
1
C, CAPACITANCE (pF)
1000
0510
C
iss
C
oss
C
rss
15 20
0
2000
3000
4000
5000
6000
25
T
J
= 25°C
2520
35
0.90.70.5
40
100
30
t
r
350
400
450
NTMFS4120N
http://onsemi.com
5
Figure 13. Thermal Response
t, TIME (seconds)
Rthja(t), EFFECTIVE TRANSIENT
THERMAL RESISTANCE
0.1
D = 0.5
SINGLE PULSE
1E-04 1E-03 1E-02 1E-01
0.2
0.01
1E+03
0.001
1
0.02
0.05
0.1
1E+00 1E+01 1E+02
0.01
NTMFS4120N
http://onsemi.com
6
PACKAGE DIMENSIONS
M 3.00 3.40
q 0 −−−
_
3.80
12
_
DFN5 5x6, 1.27P
(SO8FL)
CASE 488AA
ISSUE G
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION D1 AND E1 DO NOT INCLUDE
MOLD FLASH PROTRUSIONS OR GATE
BURRS.
1234
TOP VIEW
SIDE VIEW
BOTTOM VIEW
D1
E1
q
D
E
2
2
B
A
0.20 C
0.20 C
2 X
2 X
DIM MIN NOM
MILLIMETERS
A 0.90 1.00
A1 0.00 −−−
b 0.33 0.41
c 0.23 0.28
D 5.15 BSC
D1 4.50 4.90
D2 3.50 −−−
E 6.15 BSC
E1 5.50 5.80
E2 3.45 −−−
e 1.27 BSC
G 0.51 0.61
K 1.20 1.35
L 0.51 0.61
L1 0.05 0.17
A
0.10 C
0.10 C
DETAIL A
14
L1
e/2
8X
D2
G
E2
K
b
A0.10 BC
0.05 c
L
DETAIL A
A1
e
3 X
c
4 X
C
SEATING
PLANE
MAX
1.10
0.05
0.51
0.33
5.10
4.22
6.10
4.30
0.71
1.50
0.71
0.20
STYLE 1:
PIN 1. SOURCE
2. SOURCE
3. SOURCE
4. GATE
5. DRAIN
M
*For additional information on our PbFree strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
1.270
2X
0.750
1.000
0.905
0.475
4.530
1.530
4.560
0.495
3.200
1.330
0.965
2X
2X
3X 4X
4X
PIN 5
(EXPOSED PAD)
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NTMFS4120NT3G

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ON Semiconductor
Description:
MOSFET N-CH 30V 11A SO8FL
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