TJA1080A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 6 — 28 November 2012 7 of 49
NXP Semiconductors
TJA1080A
FlexRay transceiver
6.1.3 Bus activity and idle detection
The following mechanisms for activity and idle detection are valid for node and star
configurations in normal power modes:
• If the absolute differential voltage on the bus lines is higher than V
i(dif)det(act)
for
t
det(act)(bus)
, then activity is detected on the bus lines and pin RXEN is switched to
LOW which results in pin RXD being released:
– If, after bus activity detection, the differential voltage on the bus lines is higher than
V
IH(dif)
, pin RXD will go HIGH
– If, after bus activity detection, the differential voltage on the bus lines is lower than
V
IL(dif)
, pin RXD will go LOW
• If the absolute differential voltage on the bus lines is lower than V
i(dif)det(act)
for
t
det(idle)(bus)
, then idle is detected on the bus lines and pin RXEN is switched to HIGH.
This results in pin RXD being blocked (pin RXD is switched to HIGH or stays HIGH)
Additionally, in star configuration, activity and idle can be detected (see Figure 6
for state
transitions due to activity/idle detection in star configuration):
• If pin TXEN is LOW for longer than t
det(act)(TXEN)
, activity is detected on pin TXEN
• If pin TXEN is HIGH for longer than t
det(idle)(TXEN)
, idle is detected on pin TXEN
• If pin TRXD0 or TRXD1 is LOW for longer than t
det(act)(TRXD)
, activity is detected on
pins TRXD0 and TRXD1
• If pin TRXD0 and TRXD1 is HIGH for longer than t
det(idle)(TRXD)
, idle is detected on
pins TRXD0 and TRXD1
6.2 Operating modes in node configuration
The TJA1080A provides two control pins STBN and EN in order to select one of the
modes of operation in node configuration. See Table 3
for a detailed description of the pin
signalling in node configuration, and Figure 3
for the timing diagram.
All mode transitions are controlled via pins EN and STBN unless an undervoltage
condition is present.
If V
IO
and (V
BUF
or V
BAT
) are within their operating ranges, pin ERRN indicates the status
of the error flag. Operating ranges are: V
BAT
= 6.5 V to 60 V, V
CC
= 4.75 V to 5.25 V,
V
BUF
= 4.75 V to 5.25 V and V
IO
= 2.2 V to 5.25 V.
[1] Pin ERRN provides a serial interface for retrieving diagnostic information.
[2] Valid if V
IO
and (V
BUF
or V
BAT
) are present.
Table 3. Pin signalling in node configuration
Mode STBN EN ERRN
[1]
RXEN RXD Transmitter INH1 INH2
LOW HIGH LOW HIGH LOW HIGH
Normal HIGH HIGH error flag
set
error flag
reset
bus
activity
bus
idle
bus
DATA_0
bus
DATA_1
or idle
enabled HIGH HIGH
Receive-only HIGH LOW disabled
Go-to-sleep LOW HIGH error flag
set
[2]
error flag
reset
wake flag
set
[2]
wake
flag
reset
wake flag
set
[2]
wake
flag
reset
float
[3]
Standby LOW LOW
Sleep LOW X float float
