1. General description
The 74CBTLVD3384 is a dual 5-pole, single-throw bus switch. The device features two
output enable inputs (nOE
) that each control five switch channels. The switches are
disabled when the associated nOE
input is HIGH. Schmitt-trigger action at control inputs
makes the circuit tolerant of slower input rise and fall times. This device is fully specified
for partial power-down applications using I
OFF
. The I
OFF
circuitry disables the output,
preventing the damaging backflow current through the device when it is powered down.
2. Features and benefits
Supply voltage range from 3.0 V to 3.6 V
High noise immunity
Complies with JEDEC standard:
JESD8-B/JESD36 (3.0 V to 3.6 V)
ESD protection:
HBM JESD22-A114F exceeds 2000 V
CDM AEC-Q100-011 revision B exceeds 1000 V
5 switch connection between two ports
3 dB bandwidth at 600 MHz
Rail to rail switching on data I/O ports
CMOS low power consumption
Latch-up performance exceeds 250 mA per JESD78B Class I level A
I
OFF
circuitry provides partial Power-down mode operation
Multiple package options
Specified from 40 Cto+85C and 40 Cto+125C
74CBTLVD3384
10-bit level-shifting bus switch with 5-bit output enables
Rev. 2 — 16 December 2011 Product data sheet