74CBTLVD3384 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 2 — 16 December 2011 9 of 20
NXP Semiconductors
74CBTLVD3384
10-bit level-shifting bus switch with 5-bit output enables
9.3 ON resistance
[1] Typical values are measured at T
amb
=25C and nominal V
CC
.
[2] Measured by the voltage drop between the A and B terminals at the indicated current through the switch. ON-state resistance is
determined by the lower of the voltages of the two (A or B) terminals.
9.4 ON resistance test circuit
Table 7. Resistance R
ON
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for test circuit see Figure 13.
Symbol Parameter Conditions T
amb
= 40 C to +85 C T
amb
= 40 C to +125 C Unit
Min Typ
[1]
Max Min Max
R
ON
ON resistance V
CC
= 3.0 V to 3.6 V
[2]
I
SW
=64mA; V
I
= 0 V - 3.7 7.0 - 10.0
I
SW
=24 mA; V
I
= 0 V - 3.7 7.0 - 10.0
I
SW
= 15 mA; V
I
= 1.2 V - 4.7 10.0 - 12.0
R
ON
=V
SW
/ I
SW
.
Fig 13. Test circuit for measuring ON resistance (one switch)
001aam034
nAn
nOE
V
IL
nBn
GND
V
CC
V
l
V
SW
I
SW
V
74CBTLVD3384 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 2 — 16 December 2011 10 of 20
NXP Semiconductors
74CBTLVD3384
10-bit level-shifting bus switch with 5-bit output enables
10. Dynamic characteristics
[1] All typical values are measured at T
amb
=25C and at nominal V
CC
.
[2] The propagation delay is the calculated RC time constant of the on-state resistance of the switch and the load capacitance, when driven
by an ideal voltage source (zero output impedance).
[3] t
pd
is the same as t
PLH
and t
PHL
.
[4] t
en
is the same as t
PZH
and t
PZL
.
[5] t
dis
is the same as t
PHZ
and t
PLZ
.
11. Waveforms
Table 8. Dynamic characteristics
GND = 0 V; for test circuit see Figure 16
Symbol Parameter Conditions T
amb
= 40 C to +85 C T
amb
= 40 C to +125 C Unit
Min Typ
[1]
Max Min Max
t
pd
propagation delay nAn to nBn or nBn to
nAn; see Figure 14
[2][3]
V
CC
= 3.0 V to 3.6 V - - 0.11 - 0.22 ns
t
en
enable time nOE to nAn or nBn;
see Figure 15
[4]
V
CC
= 3.0 V to 3.6 V 1.5 2.8 5.0 1.5 6.0 ns
t
dis
disable time nOE to nAn or nBn;
see Figure 15
[5]
V
CC
= 3.0 V to 3.6 V 0.8 3.2 7.0 0.8 8.0 ns
Measurement points are given in Table 9.
Logic levels: V
OL
and V
OH
are typical output voltage levels that occur with the output load.
Fig 14. The data input (nAn, nBn) to output (nBn, nAn) propagation delay times
001aai367
V
M
V
M
V
M
V
M
V
I
input
0 V
V
OH
output
V
OL
t
PHL
t
PLH
Table 9. Measurement points
Supply voltage Input Output
V
CC
V
M
V
I
t
r
= t
f
V
M
V
X
V
Y
3.0 V to 3.6 V 0.5V
CC
V
CC
2.0 ns 0.9 V V
OL
+0.15V V
OH
0.15 V
74CBTLVD3384 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 2 — 16 December 2011 11 of 20
NXP Semiconductors
74CBTLVD3384
10-bit level-shifting bus switch with 5-bit output enables
Measurement points are given in Table 9.
Logic levels: V
OL
and V
OH
are typical output voltage levels that occur with the output load.
Fig 15. Enable and disable times
aaa-000029
V
I
V
M
t
PLZ
t
PHZ
t
PZH
t
PZL
V
X
V
Y
V
M
V
M
outputs
enabled
outputs
disabled
outputs
enabled
V
M
V
OL
V
OH
GND
nOE input
GND
1.8 V
output
LOW to OFF
OFF to LOW
output
HIGH to OFF
OFF to HIGH

74CBTLVD3384DK,118

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
Digital Bus Switch ICs 10 SWT 3.3V 100mA
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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