IRF7807ATRPBF

Parameter Symbol IRF7807 IRF7807A Units
Drain-Source Voltage V
DS
30 V
Gate-Source Voltage V
GS
±12
Continuous Drain or Source 25°C I
D
8.3 8.3 A
Current (V
GS
4.5V) 70°C 6.6 6.6
Pulsed Drain Current I
DM
66 66
Power Dissipation 25°C P
D
2.5 W
70°C 1.6
Junction & Storage Temperature Range T
J
,
T
STG
–55 to 150 °C
Continuous Source Current (Body Diode) I
S
2.5 2.5 A
Pulsed source Current I
SM
66 66
N Channel Application Specific MOSFETs
Ideal for Mobile DC-DC Converters
Low Conduction Losses
Low Switching Losses
Lead-Free
Description
These new devices employ advanced HEXFET
Power MOSFET technology to achieve an
unprecedented balance of on-resistance and gate
charge. The reduced conduction and switching losses
make them ideal for high efficiency DC-DC
Converters that power the latest generation of mobile
microprocessors.
A pair of IRF7807 devices provides the best cost/
performance solution for system voltages, such as 3.3V
and 5V.
HEXFET
®
Chip-Set for DC-DC Converters
Absolute Maximum Ratings
Parameter Max. Units
Maximum Junction-to-Ambient R
θJA
50 °C/W
Thermal Resistance
Top View
8
1
2
3
4
5
6
7
D
D
D
D
G
S
A
S
S
IRF7807PbF
IRF7807APbF
www.irf.com 1
09/22/04
SO-8
IRF7807 IRF7807A
Vds 30V 30V
Rds(on) 25m 25m
Qg 17nC 17nC
Qsw 5.2nC
Qoss 16.8nC 16.8nC
Device Features
PD – 95290
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IRF7807/APbF
Parameter Min Typ Max Min Typ Max Units Conditions
Diode Forward V
SD
1.2 1.2 V I
S
= 7A, V
GS
= 0V
Voltage*
Reverse Recovery Q
rr
80 80 nC di/dt = 700A/µs
Charge V
DS
= 16V, V
GS
= 0V, I
S
= 7A
Reverse Recovery Q
rr(s)
50 50
Charge (with Parallel
Schotkky)
Parameter Min Typ Max Min Typ Max Units Conditions
Drain-to-Source V
(BR)DSS
30 30 V V
GS
= 0V, I
D
= 250µA
Breakdown Voltage*
Static Drain-Source R
DS
(on) 17 25 17 25 m V
GS
= 4.5V, I
D
= 7A
on Resistance*
Gate Threshold Voltage* V
GS
(th) 1.0 1.0 V V
DS
= V
GS
, I
D
= 250µA
Drain-Source Leakage I
DSS
30 30 µA V
DS
= 24V, V
GS
= 0
150 150 V
DS
= 24V, V
GS
= 0,
Tj = 100°C
Gate-Source Leakage I
GSS
±100 ±100 nA V
GS
= ±12V
Current*
Total Gate Charge* Q
g
12 17 12 17 V
GS
= 5V, I
D
= 7A
Pre-Vth Q
gs1
2.1 2.1 V
DS
= 16V, I
D
= 7A
Gate-Source Charge
Post-Vth Q
gs2
0.76 0.76 nC
Gate-Source Charge
Gate to Drain Charge Q
gd
2.9 2.9
Switch Charge* Q
SW
3.66 5.2 3.66
(Q
gs2
+ Q
gd
)
Output Charge* Q
oss
14 16.8 14 16.8 V
DS
= 16V, V
GS
= 0
Gate Resistance R
g
1.2 1.2
Turn-on Delay Time t
d
(on) 12 12 V
DD
= 16V
Rise Time t
r
17 17 ns I
D
= 7A
Turn-off Delay Time t
d
(off) 25 25 R
g
= 2
Fall Time t
f
66V
GS
= 4.5V
Resistive Load
Electrical Characteristics
Source-Drain Rating & Characteristics
Notes:
Repetitive rating; pulse width limited by max. junction temperature.
Pulse width 300 µs; duty cycle 2%.
When mounted on 1 inch square copper board, t < 10 sec.
Typ = measured - Q
oss
* Devices are 100% tested to these parameters.
IRF7807 IRF7807A
Current*
di/dt = 700A/µs
(with 10BQ040)
V
DS
= 16V, V
GS
= 0V, I
S
= 7A
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IRF7807/APbF
Control FET
Special attention has been given to the power losses
in the switching elements of the circuit - Q1 and Q2.
Power losses in the high side switch Q1, also called the
Control FET, are impacted by the R
ds(on)
of the MOSFET,
but these conduction losses are only about one half of
the total losses.
Power losses in the control switch Q1 are given by;
P
loss
= P
conduction
+ P
switching
+ P
drive
+ P
output
This can be expanded and approximated by;
P
loss
= I
rms
2
× R
ds(on)
()
+ I ×
Q
gd
i
g
× V
in
× f
+ I ×
Q
gs2
i
g
× V
in
× f
+ Q
g
× V
g
× f
()
+
Q
oss
2
×V
in
× f
This simplified loss equation includes the terms Q
gs2
and Q
oss
which are new to Power MOSFET data sheets.
Q
gs2
is a sub element of traditional gate-source charge
that is included in all MOSFET data sheets. The impor-
tance of splitting this gate-source charge into two sub
elements, Q
gs1
and Q
gs2
, can be seen from Fig 1.
Q
gs2
indicates the charge that must be supplied by
the gate driver between the time that the threshold volt-
age has been reached (t1) and the time the drain cur-
rent rises to I
dmax
(t2) at which time the drain voltage
begins to change. Minimizing Q
gs2
is a critical factor in
reducing switching losses in Q1.
Q
oss
is the charge that must be supplied to the output
capacitance of the MOSFET during every switching
cycle. Figure 2 shows how Q
oss
is formed by the paral-
lel combination of the voltage dependant (non-linear)
capacitance’s C
ds
and C
dg
when multiplied by the power
supply input buss voltage.
Figure 1: Typical MOSFET switching waveform
Synchronous FET
The power loss equation for Q2 is approximated
by;
P
loss
= P
conduction
+ P
drive
+ P
output
*
P
loss
= I
rms
2
× R
ds(on)()
+ Q
g
× V
g
× f
()
+
Q
oss
2
×V
in
× f
+ Q
rr
× V
in
×
f
(
)
*dissipated primarily in Q1.
Power MOSFET Selection for DC/DC
Converters
4
1
2
Drain Current
Gate Voltag
e
Drain Voltage
t3
t2
t1
V
GTH
Q
GS1
Q
GS2
Q
GD
t0

IRF7807ATRPBF

Mfr. #:
Manufacturer:
Infineon / IR
Description:
MOSFET MOSFT 30V 6.6A 25mOhm 12nC
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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