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LC75886PWH-H

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© Semiconductor Components Industries, LLC, 2017 1 Publication Order Number :
July 2017 - Rev. 1 LC75886PW/D
www.onsemi.com
ORDERING INFORMATION
See detailed ordering and shipping information on page 36 of this data sheet.
* Computer Control Bus (CCB) is an ON Semiconductor’s original bus format and
the bus addresses are controlled by ON Semiconductor.
LC75886PW
1/4, 1/3-Duty LCD Driver
with Key Input Function
Overview
The LC75886PW is 1/4 duty and 1/3 duty LCD display driver that can
directly drive up to 224 segments and can control up to 5 general-
purpose output ports. This product also incorporates a key scan circuit
that accepts input from up to 30 keys to reduce printed circuit board
wiring.
Features
Key input function for up to 30 keys (A key scan is performed only
when a key is pressed.)
1/4 duty 1/3 bias and 1/3 duty 1/3 bias drive schemes can be
controlled from serial data.
Capable of driving up to 224 segments using 1/4 duty and up to 171
segments using 1/3 duty.
Switching between key scan output and segment output can be
controlled from serial data.
The key scan operation enabled/disabled state can be controlled from
serial data.
Switching between segment output port and general-purpose output
port can be controlled from serial data.
Switching between general-purpose output port, clock output port,
and segment output port can be controlled from serial data.
(Up to 5 general-purpose output ports and up to one clock output port)
Serial data I/O supports CCB* format communication with the system
controller. (Support 3.3 V and 5 V operation)
Sleep mode and all segments off functions that are controlled from
serial data.
The frame frequency of the common and segment output waveforms
can be controlled from serial data.
Switching between RC oscillator operating mode and external clock
operationg mode can be controlled from serial data.
Direct display of display data without the use of a decoder provides
high generality.
Provision of an on-chip voltage-detection type reset circuit prevents
incorrect displays.
RES
pin provided for forcibly initializing the IC internal circuits.
SQFP80 12x12 / SQFP80
LC75886PW
www.onsemi.com
2
Specifications
Absolute Maximum Ratings
at Ta = 25C, V
SS
= 0 V
Parameter Symbol Conditions Ratings Unit
Maximum supply voltage
V
DD
max V
DD
0.3 to +7.0
V
Input voltage
V
IN
1
CE, CL, DI,
RES
0.3 to +7.0
V
V
IN
2 OSC, TEST, V
DD
1, V
DD
2, KI1 to KI5
0.3 to V
DD
+0.3
Output voltage V
OUT
1
DO
0.3 to +7.0
V
V
OUT
2
OSC, S1 to S57, COM1 to COM4, KS1 to KS6,
P1 to P5
0.3 to V
DD
+0.3
Output current I
OUT
1
S1 to S57
300
A
I
OUT
2
COM1 to COM4
3
mA
I
OUT
3
KS1 to KS6
1
I
OUT
4
P1 to P5
5
Allowable power dissipation Pd max
Ta = 85C
200
mW
Operating temperature Topr
40 to +85
C
Storage temperature Tstg
55 to +125
C
Allowable Operating Ranges
at Ta = 40 to +85C, V
SS
= 0 V
Parameter Symbol Conditions
Ratings
Unit
min typ max
Supply voltage V
DD
V
DD
4.5 6.0 V
Input voltage V
DD
1 V
DD
1
2/3V
DD
V
DD
V
V
DD
2 V
DD
2
1/3V
DD
V
DD
Input high level voltage V
IH
1
CE, CL, DI,
RES
0.4V
DD
6.0
V
V
IH
2 KI1 to KI5
0.6V
DD
V
DD
V
IH
3 OSC: External clock operating mode
0.4V
DD
V
DD
Input low level voltage V
IL
1
CE, CL, DI,
RES
0 0.2V
DD
V
V
IL
2 KI1 to KI5
0 0.2V
DD
V
IL
3 OSC: External clock operating mode
0 0.2V
DD
Recommended external
resistor for RC oscillation
R
OSC
OSC: RC oscillation operating mode
39 k
Recommended external
capacitor for RC oscillation
C
OSC
OSC: RC oscillation operating mode
1000 pF
Guaranteed range of RC
oscillation
f
OSC
OSC: RC oscillation operating mode
19 38 76 kHz
External clock operating
frequency
f
CK
OSC: External clock operating mode
[Figure4]
10 38 76 kHz
External clock duty cycle D
CK
OSC: External clock operating mode
[Figure4]
30 50 70 %
Data setup time t
ds
CL, DI [Figure2], [Figure3]
160 ns
Data hold time t
dh
CL, DI [Figure2], [Figure3]
160 ns
CE wait time t
cp
CE, CL [Figure2], [Figure3]
160 ns
CE setup time t
cs
CE, CL [Figure2], [Figure3]
160 ns
CE hold time t
ch
CE, CL [Figure2], [Figure3]
160 ns
High level clock pulse width t
H
CL [Figure2], [Figure3]
160 ns
Low level clock pulse width t
L
CL [Figure2], [Figure3]
160 ns
Rise time t
r
CE, CL, DI [Figure2], [Figure3]
160 ns
Fall time t
f
CE, CL, DI [Figure2], [Figure3]
160 ns
DO output deley time t
dc
DO R
PU
= 4.7 kΩ C
L
= 10 pF *1
[Figure2], [Figure3]
1.5 s
DO rise time t
dr
DO R
PU
= 4.7 kΩ C
L
= 10 pF *1
[Figure2], [Figure3]
1.5 s
Note: *1 Since the DO pin is an open-drain output, these times depend on the values of the pull-up resistor
R
PU
and the load capacitance C
L
.
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed,
damage may occur and reliability may be affected.
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended
Operating Ranges limits may affect device reliability.
LC75886PW
www.onsemi.com
3
Electrical Characteristics for the Allowable Operating Ranges
Parameter Symbol Pin Conditions
Ratings
Unit
min typ max
Hysteresis V
H
1
CE, CL, DI,
RES
0.03V
DD
V
V
H
2 KI1 to KI5
0.1V
DD
Power-down
detection voltage
V
DET
2.0 2.3 2.6 V
Input high level
current
I
IH
1
CE, CL, DI,
RES
V
I
= 6.0 V
5.0
A
I
IH
2 OSC V
I
= V
DD
:
External clock
operating mode
5.0
Input low level
current
I
IL
1
CE, CL, DI,
RES
V
I
= 0 V
5.0
A
I
IL
2 OSC V
I
= 0 V : External clock
operating mode
5.0
Input floating
voltage
V
IF
KI1 to KI5
0.05V
DD
V
Pull-down
resistance
RPD KI1 to KI5 V
DD
= 5.0 V
50 100 250
k
Output off leakage
current
I
OFFH
DO V
O
= 6.0 V
6.0
A
Output high level
voltage
V
OH
1 KS1 to KS6
I
O
= 500 A V
DD
1.0 V
DD
0.5 V
DD
0.2
V
V
OH
2 P1 to P5
I
O
= 1 mA V
DD
0.9
V
OH
3 S1 to S57
I
O
= 20 A V
DD
0.9
V
OH
4 COM1 to COM4
I
O
= 100 A V
DD
0.9
Output low level
voltage
V
OL
1 KS1 to KS6
I
O
= 25 A
0.2 0.5 1.5
V
V
OL
2 P1 to P5 I
O
= 1 mA
0.9
V
OL
3 S1 to S57
I
O
= 20 A
0.9
V
OL
4 COM1 to COM4
I
O
= 100 A
0.9
V
OL
5 DO I
O
= 1 mA
0.1 0.3
Output middle
level voltage
*2
V
MID
1 S1 to S57
1/3 bias I
O
= 20 A
2/3V
DD
0.9
2/3V
DD
+0.9
V
V
MID
2 S1 to S57
1/3 bias I
O
= 20 A
1/3V
DD
0.9
1/3V
DD
+0.9
V
MID
3 COM1 to COM4
1/3 bias I
O
= 100 A
2/3V
DD
0.9
2/3V
DD
+0.9
V
MID
4 COM1 to COM4
1/3 bias I
O
= 100 A
1/3V
DD
0.9
1/3V
DD
+0.9
Oscillator
frequency
f
OSC
OSC R
OSC
= 39 kΩ,
C
OSC
= 1000 pF
RC oscillation operating mode
30.4 38 45.6 kHz
Current drain I
DD
1 V
DD
Sleep mode
100
A
I
DD
2 V
DD
V
DD
= 6.0 V,
Output open,
RC oscillation operating mode,
f
OSC
= 38 kHz
450 900
I
DD
3 V
DD
V
DD
= 6.0 V
, Output open,
External clock operating mode,
f
CK
= 38 kHz,
V
IH
3 = 0.5V
DD
,
V
IL
3 = 0.1V
DD
550 1100
Note: *2. Excluding the bias voltage generation divider resistor built into the V
DD
1 and V
DD
2. (See [Figure 1])
V
DD
Excluding these resistors
To the common and segment drivers
V
DD
2
[Figure 1]
V
DD
1
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be
indicated by the Electrical Characteristics if operated under different conditions.
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LC75886PWH-H

Mfr. #:
Buy LC75886PWH-H
Manufacturer:
ON Semiconductor
Description:
LCD Drivers LCD DISPLAY DRIVER
Lifecycle:
New from this manufacturer.
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