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2. 1/3 duty
(1) When CL is stopped at the low level
Note: B0 to B3, A0 to A3 ······ CCB address
DD ························· Direction data
B1 B0
D2 D1
1 0
D50
KSC
DD
(3 bits)
Control data (12 bits) Display data (57 bits)
DI
CL
CE
0 0 0
D53
1 0 0
B3 B2 A1 A0 A3 A2
D51 D55 D54 D56
SC P2 P1 P0
0 0 1
K1
S0 S1 K0
D52 D47 D48 D49
PC51 PC50
OC D57
DO
B1 B0
D59 D58
1 0 0 0 0 1 0 0
B3 B2 A1 A0 A3 A2
FC2 FC1 FC0
0 1 0 1 0
0
0 0 0 0 0 0
D114 D113 D112 D111 D110 D109
D108 D107 D106 D105 D104
B1 B0
D115
1 0 0 0 0 1 0 0
B3 B2 A1 A0 A3 A2
0 0 0 0 0 1 1 0
0
0 0 0 0 0 0
D171 D170 D169 D168 D167 D166
D165 D164 D163 D162 D161 D116
DD
(3 bits)
Control data (12 bits)
Display data (57 bits)
DD
(3 bits)
Fixed data (12 bits) Display data (57 bits)
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(2) When CL is stopped at the high level
Note: B0 to B3, A0 to A3 ······ CCB address
DD ························· Direction data
CCB address ········ “42H”
D1 to D171 ·········· Display data
OC ···················· RC oscillator operating mode/external clock operationg mode switching control data
PC50, PC51 ········· General-purpose output port/clock output port/segment output port switching control data
KSC ·················· Key scan operation enabled/disabled state setting control data
S0, S1 ················ Sleep control data
K0, K1 ··············· Key scan output/segment output switching control data
P0 to P2 ·············· Segment output port/general-purpose output port switching control data
SC ···················· Segment on/off control data
FC0 to FC2 ·········· Common and segment output waveform frame frequency control data
B1 B0
D2 D1
1 0
D50
KSC
DD
(3 bits)
Control data (12 bits) Display data (57 bits)
DI
CL
CE
0 0 0
D53
1 0 0
B3 B2 A1 A0 A3 A2
D51 D55 D54 D56
SC P2 P1 P0
0 0 1
K1
S0 S1 K0
D52 D47 D48 D49
PC51 PC50
OC D57
DO
B1 B0
D59 D58
1 0 0 0 0 1 0 0
B3 B2 A1 A0 A3 A2
FC2 FC1 FC0
0 1 0 1 0
0
0 0 0 0 0 0
D114 D113 D112 D111 D110 D109
D108 D107 D106 D105 D104
B1 B0
1 0
0 0 0 1 0 0
B3 B2 A1 A0 A3 A2
0 0 0 0 0 1 1 0
0
0 0 0 0 0 0
D171 D170 D169 D168 D167 D166
D165 D164 D163 D162 D161 D116
D115
DD
(3 bits)
Control data (12 bits) Display data (57 bits)
DD
(3 bits)
Fixed data (12 bits) Display data (57 bits)
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Control Data Functions
1. OC … RC oscillator operating mode/external clock operating mode switching control data
This control data bit selects the OSC pin function (RC oscillator operating mode or external clock operating mode)
OC OSC pin function
0 RC oscillator operating mode
1 External clock operating mode
Note: If RC oscillator operating mode is selected, connect an external resistor R
OSC
and an external capacitor C
OSC
to the OSC pin.
2. PC50, PC51 … General-purpose output port/clock output port/segment output port switching control data
These control data bits swithes the functions of the P5/S57 output pin between the general-purpose output port, the
clock output port, and the segment output port.
Control data
The state of P5/S57 output pin
PC50 PC51
0 0 General-purpose output port (P5) (”L” level output)
1 0 General-purpose output port (P5) (“H” level output)
0 1 Clock output port (P5) (Clock frequency is f
OSC
/2 or f
CK
/2)
1 1 Segment output port (S57)
Note: If the sleep mode is set, the P5/S57 output pin can not be used as the clock output port.
3. KSC … Key scan operation enabled/disabled state setting control data
This control data bit enables or disables key scan operation.
KSC Key scan operating state
0
Key scan operation enabled
(A key scan operation is performed if any key on the lines corresponding to KS1 to KS6 pin which is set
high is pressed.)
1
Key scan operation disabled
(No key scan operation is performed, even if any of the keys in the key matrix are pressed.
If this state is set up, the key data is forcibly reset to 0 and the key data read request is also cleared.
(DO is set high.))
4. S0, S1 … Sleep control data
These control data bits switch between normal mode and sleep mode, and set the states of the KS1 to KS6 key scan
output during key scan standby.
Control data
Mode
OSC pin state
(RC oscillator
or acceptance
of the external
clock signal)
Segment
output /
Common
output
Output pin states during key scan standby
S0 S1 KS1 KS2 KS3 KS4 KS5 KS6
0 0 Normal Operating Operating H H H H H H
0 1 Sleep Stopped L L L L L L H
1 0 Sleep Stopped L L L L L H H
1 1 Sleep Stopped L H H H H H H
Note: This assumes that the KS1/S55 and KS2/S56 output pins are selected for key scan output.

LC75886PWH-H

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
LCD Drivers LCD DISPLAY DRIVER
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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