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LTC3878IGN#PBF

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P26
LTC3878
16
3878fa
applicaTions inForMaTion
Regulator output current is negative when I
TH
is between
0V and 0.8V and positive when I
TH
is between 0.8V and the
maximum full-scale set-point of 2.4V. In normal operating
conditions the RUN/SS pin will continue to charge positive
until the voltage is equal to INTV
CC
.
INTV
CC
Undervoltage Lockout
Whenever INTV
CC
drops below approximately 3.4V, the
device enters undervoltage lockout (UVLO). In a UVLO
condition, the switching outputs TG and BG are disabled.
At the same time, the RUN/SS pin is pulled down from
INTV
CC
to 0.8V with a 3µA current source. When the
INTV
CC
UVLO condition is removed, RUN/SS ramps from
0.8V and begins a normal current limited soft-start. This
feature is important when regulator start-up is not initi
-
ated by
applying a logic drive to RUN/SS. Soft-start from
INTV
CC
UVLO release greatly reduces the possibility for
start-up oscillations caused by the regulator starting up
at INTV
CC(UVLOR)
and then shutting down at INTV
CC(UVLO)
due to inrush current.
Efficiency Considerations
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Although all dissipative
elements in the circuit produce losses, four main sources
account for most of the losses in LTC3878 circuits.
1. DC I
2
R losses. These arise from the resistances of the
MOSFETs, inductor and PC board traces and cause the
efficiency to drop at high output currents. In continuous
mode the average output current flows though the inductor
L, but is chopped between the top and bottom MOSFETs.
If the two MOSFETs have approximately the same R
DS(ON)
,
then the resistance of one MOSFET can simply by summed
with the resistances of L and the board traces to obtain
the DC I
2
R loss. For example, if R
DS(ON)
= 0.01Ω and
R
L
= 0.005Ω, the loss will range from 15mW to 1.5W as
the output current varies from 1A to 10A.
2. Transition loss. This loss arises from the brief amount
of time the top MOSFET spends in the saturated region
during switch node transitions. It depends upon the
input voltage, load current, driver strength and MOSFET
capacitance, among other factors. The loss is significant
at input voltages above 20V.
3. INTV
CC
current. This is the sum of the MOSFET driver
and control currents.
4. C
IN
loss. The input capacitor has the difficult job of filter-
ing the large RMS input current to the regulator. It must have
a very low ESR to minimize the AC I
2
R loss and sufficient
capacitance to prevent the RMS current from causing ad-
ditional
upstream losses in fuses or batteries.
Other losses, which include the C
OUT
ESR loss, bottom
MOSFET reverse recovery loss and inductor core loss
generally account for less than 2% additional loss.
When making adjustments to improve efficiency, the input
current is the best indicator of changes in efficiency. If you
make a change and the input current decreases, then the
efficiency has increased. If there is no change in input
current there is no change in efficiency.
Checking Transient Response
The regulator loop response can be checked by looking
at the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, V
OUT
immediately shifts by an amount
equal to ∆I
LOAD
(ESR), where ESR is the effective series
resistance of C
OUT
. ∆I
LOAD
also begins to charge or dis-
charge C
OUT
, generating a feedback error signal used by the
regulator to return V
OUT
to its steady-state value. During
this recovery time, V
OUT
can be monitored for overshoot
or ringing that would indicate a stability problem. The I
TH
pin external components shown in the Design Example will
provide adequate compensation for most applications.
A rough compensation check can be made by calculating
the gain crossover frequency, f
GCO
. g
m(EA)
is the error
amplifier transconductance, R
C
is the compensation re-
sistor and feedback divider attenuation is assumed to be
0.8V/V
OUT
. This equation assumes that no feed-forward
compensation is used on feedback and that C
OUT
sets the
dominant output pole.
f g R
I
C V
GCO m EA C
LIMIT
OUT OUT
=
( )
• •
.
•
• •
•
.
1 6
1
2
0 8
π
LTC3878
17
3878fa
applicaTions inForMaTion
As a rule of thumb the gain crossover frequency should be
less than 20% of the switching frequency. For a detailed
explanation of switching control loop theory see Applica
-
tion
Note 76.
High Switching Frequency Operation
Special care should be taken when operating at switching
frequencies greater than 800kHz. At high switching frequen
-
cies there
may be an increased sensitivity to PCB noise
which may result in off-time variation greater than normal.
This off-time instability can be prevented in several ways.
First, carefully follow the recommended layout techniques.
Second, use 2µF or more of X5R or X7R ceramic input
capacitance per Amps of load current. Third, if necessary,
increase the bottom MOSFET ripple voltage to 30mV
P-P
or greater. This ripple voltage is equal to R
DS(ON)
typical
at 25°C • I
P-P
.
Design Example
Figure 7 is a power supply design example with the fol
-
lowing specifications:
V
IN
= 4.5V to 28V (12V nominal),
V
OUT
= 1.2V ±5%, I
OUT(MAX)
= 15A and f = 400kHz. Start
by calculating the timing resistor, R
ON
:
R
V
V kHz pF
k
ON
= =
1 2
0 7 400 10
429
.
. • •
Select the nearest standard resistor value of 432k for a
nominal operating frequency of 396kHz. Set the inductor
value to give 35% ripple current at maximum V
IN
using
the adjusted operating frequency:
L
V
kHz A
µH=
=
1 2
396 0 35 15
1
1 2
28
0 55
.
• . •
–
.
.
Select 0.56µH which is the nearest value.
The resulting maximum ripple current is:
∆I
V
kHz µH
V
V
A
L
=
=
1 2
396 0 56
1
1 2
28
5 1
.
• .
–
.
.
Choose the synchronous bottom MOSFET switch and
calculate the V
RNG
current limit set-point. To calculate
V
RNG
and V
DS
, the ρτ term normalization factor (unity
at 25°C) is required to account for variation in MOSFET
on-resistance with
temperature. Choosing an RJK0330
(R
DS(ON)
= 2.8mΩ (nominal) 3.9mΩ (maximum), V
GS
=
4.5V, θ
JA
= 40°C/W) yields a drain source voltage of:
V I I m
DS LIMIT RIPPLE
=
( )
( )
– .
1
2
3 9 Ω ρτ
Figure 7. Design Example: 1.2V/15A at 400kHz
+
RUN/SS
LTC3878
BOOST
16
C
B
0.22µF
M1
RJK0305DPB
C
VCC
4.7µF
C
C1
220pF
C
C2
33pF
D
B
CMDSH-3
L1
0.56µH
C
OUT1
330µF
2.5V
s2
C
OUT2
47µF
6.3V
s2
+
C
IN1
10µF
50V
s3
C
IN2
100µF
50V
V
OUT
1.2V
15A
3878 F07
V
IN
4.5V TO 28V
1
PGOOD
R
PG
100k
R2
80.6k
R
C
12.1k
R
FB1
10.0k
R1
10.0k
TG
152
V
RNG
SW
143
FCB PGND
134
I
TH
BG
125
SGND INV
CC
116
I
ON
V
IN
107
V
FB
NC
98
R
ON
432k
R
FB2
5.11k
M2
RJK0330DPB
C
IN1
: UMK325BJ106MM s3
C
OUT1
: SANYO 2R5TPE330M9 s2
C
OUT2
: MURATA GRM31CR60J476M s2
L1: VISHAY IHLP4040DZ-11 0.56µH
C
SS
0.1µF
LTC3878
18
3878fa
V
RNG
sets current limit by fixing the maximum peak V
DS
voltage on the bottom MOSFET switch. As a result, the
average DC current limit includes significant temperature
and component variability. Design to guarantee that the
average DC current limit will always exceed the rated oper
-
ating output
current by assuming worst-case component
tolerance and temperature.
The worst-case minimum INTV
CC
is 5.15V. The bottom
MOSFET worst-case R
DS(ON)
is 3.9mΩ and the junction
temperature is 80°C above a 70°C ambient with ρ
150°C
=
1.5. Set T
ON
equal to the minimum specification of 15%
low and the inductor 15% high.
By setting I
LIMIT
equal to 15A we get 79mV for peak V
DS
voltage which corresponds to a V
RNG
equal to 592mV:
V A A
m
V
DS
=
15
1
2
5 1
0 85
1 15
3 9
5 15
5 3
– • . •
.
.
.
.
.
Ω
VV
V V
RNG DS
• .
. •
1 5
7 5=
Verify that the calculated nominal T
J
is less than the
assumed worst-case T
J
in the bottom MOSFET:
P
V V
V
A m W
T C
BOT
J
=
( )
=
= ° +
28 1 2
28
15 1 5 3 9 1 25
70 1
2
– .
• . • . .Ω
.. • /25 40 120W C W C° = °
B
ecause the top MOSFET is on for a short time, an
RJK0305DPB (R
DS(ON)
= 10mΩ (nominal) 13mΩ (maxi-
mum) (C
MILLER
= Q
GD
/10V = 150pF, V
BOOST
= 5V), V
GS
=
4.5V, V
MILLER
= 3V, θ
JA
= 40°C/W) is sufficient. Checking its
power dissipation at current limit with = ρ
100°C
= 1.4:
P
V
V
A m V
A
TOP
=
( )
+
( )
1 2
28
15 1 4 13 28
15
2
150
2 2
.
• . • Ω
ppF
V V V
kHz
W W
( )
−
+
= + =
2 5
5 3
1 2
3
400
0 18 0 58 0
. .
. .
Ω Ω
..
. • /
65
70 0 76 40 100
W
T C W C W C
J
= ° + ° = °
The junction temperatures will be significantly less at
nominal current, but this analysis shows that careful
attention
to heat sinking will be necessary.
Select C
IN
to give an RMS current rating greater than 4A
at 85°C. The output capacitor C
OUT1
is chosen for a low
ESR of 4.5mΩ to minimize output voltage changes due to
inductor ripple current and load steps. The output voltage
ripple is given as:
∆ ∆
Ω
V I ESR
m mV
OUT RIPPLE L MAX( ) ( )
. • .
=
( )
= =5 1 4 5 23
However, a 0A to 10A load step will cause an output
change of up to:
∆ ∆
Ω
V I ESR
A m mV
OUT STEP LOAD( )
• .
=
( )
= =10 4 5 45
Optional 2 × 47µF ceramic output capacitors are included
to minimize the effect of ESR and ESL in the output ripple
and to improve load step response.
PC Board Layout Checklist
The LTC3878 PC board layout can be designed with or
without a ground plane. A ground plane is generally pre
-
ferred
based on performance and noise concerns.
When using a ground plane, use a dedicated ground plane
layer. In addition, for high current it is recommended to
use a multilayer board to help with heat sinking power
components.
l The ground plane layer should have no traces and be
as close as possible to the routing layer connecting the
power MOSFET’s.
l Place LTC3878 Pins 9 to 16 facing the power compo-
nents. Keep components connected to Pin 1 close to
LTC3878 (noise sensitive components).
l Place C
IN
, C
OUT
, MOSFETs, D
B
and inductor all in one
compact area. It may help to have some components
on the bottom side of the board.
l Use an immediate via to connect components to the
ground plane SGND and PGND of LTC3878. Use several
larger vias for power components.
l Use compact switch node (SW) plane to improve cool-
ing of the MOSFETs and to keep EMI down.
applicaTions inForMaTion
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LTC3878IGN#PBF

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Buy LTC3878IGN#PBF
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators Wide Operating Range No Rsense Step-Down Controller
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