KSZ8863FLL-EVAL

KSZ8863MLL/FLL/RLL Evaluation Board User’s Guide
Micrel, Inc. January 11, 2011
Confidential Rev. 1.1
10/10
KSZ8863RLL. Register 198 bit[3] is used to select internal or external reference clock for the
KSZ8863RLL RMII interface. If pin 2-3 of JP28 is closed, the REFCLKO disable.
Table 6: RMII Clock Setting
5.0 Reference Documents
KSZ8863MLL/FLL/RLL Datasheet Rev. 1.1 (Contact Micrel for latest Datasheet)
KSZ8863MLL/FLL/RLL Evaluation Board Schematic Rev. 1.0 (Contact Micrel for latest
Schematic)
KSZ8863MLL/FLL/RLL Evaluation Board Gerber files
Micrel Switch Configuration Software User Guide
Reg198[3] EN_REFCLKO_3 Clock Source Note
0 0 External 50MHz
OSC input to
REFCLKI_3
EN_REFCLKO_3 =
0 to Disable
REFCLKO_3 for
better EMI
0 1 REFCLKO_3
Output Is Feedback
to REFCLKI_3
EN_REFCLKO_3 =
1 to Enable
REFCLKO_3
1 1 Internal Clock
Source
REFCLKI_3 is
unconnected
EN_REFCLKO_3 =
1 to Enable
REFCLKO_3
1 0 Not suggest

KSZ8863FLL-EVAL

Mfr. #:
Manufacturer:
Description:
Ethernet Development Tools 3-Port 10/100 Ethernet Switch with 1x FX Port and 1x TX Port - Evaluation Board
Lifecycle:
New from this manufacturer.
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