NCP1205
http://onsemi.com
12
Zero Crossing Detector
To detect the zero primary current, we make use of an
auxiliary winding. By coupling this winding to the primary,
we have a voltage image of the flux activity in the core.
Figure 10 details the shape of the signal in BCM (L = Lc).
The auxiliary winding for demagnetization needs to
be wired in Forward mode. However, the application
note describes an alternative solution showing how to wire
the winding in Flyback as well. As Figure 13 depicts, when
the MOSFET closes, the auxiliary winding delivers
(Naux/Np . Vin). At the switch opening, we couple the
auxiliary winding to the main output power winding and
thus deliver: (−Naux/Ns . Vout). When DCM occurs, the
ringing also takes place on the auxiliary winding. As soon
as the level crosses−up the internal reference level
(65 mV), a signal is internally sent to restart the MOSFET.
Three different conditions can occur:
1. In BCM, every time the 65 mV line is crossed, the
switch is immediately turned−on. By accounting
for the internal Demag pin capacitance (10−15 pF
typical), you can introduce a fixed delay, which,
combined to the propagation delay, allows to
precisely restart in the drain−source valley
(minimum voltage to reduce capacitive losses).
2. When the IC enters VFM, the VCO delivers a
pulse which is internally latched. As soon as the
demagnetization pulse appears, the logic restarts
the MOSFET.
3. As can be seen from Figure 13, the parasitic
oscillations on the drain are subject to a natural
damping, mainly imputed to ohmic losses. At a
given point, the demag activity on the auxiliary
winding becomes too low to be detected. To avoid
any restart problem, the NCP1205 features an
internal 4.0 ms timeout delay. This timeout runs
after each demag pulse. If within 4.0 ms further to
a demag pulse no activity is detected, an internal
signal is combined with the VCO to actually
restart the MOSFET (synchronized with Ct).
Error Amplifier and Fault Detection
The NCP1205 features an internal error amplifier solely
used to detect an overcurrent problem. The application
assumes that all the error gain associated with the precise
reference level is located on the secondary side of the SMPS.
Various solutions can be purposely implemented such as the
TL431 or a dedicated circuit like the MC33341. In the
NCP1205, the internal OPAMP is used to create a virtual
ground permanently biased at 2.5 V (Figure 14), an internal
reference level. By monitoring this virtual ground further
called V(−), we have the possibility to confirm the good
behavior of the loop. If by any mean the loop is broken
(shorted optocoupler, open LED etc.) or the regulation
cannot be reached (true output short−circuit), the OPAMP
network is adjusted in order to no longer be able to ensure
the 2.5 V virtual point V(−). If V(−) passes down the 1.5 V
level (e.g. output shorted) for a time longer than 128 ms, then
the pulses are stopped for 8 x 128 ms. The IC enters a kind
of burst mode with bunch of pulses lasting 128 ms and
repeating every 8 x 128 ms. If the loop is restored within the
8 x 128 ms period, then the pulses are back again on the
output drive (synchronized with UVLO
H
).
2
750.0 U 754.0 U 758.0 U 762.0 U 766.0 U
I
P
= 0
Auxiliary Level
Restart when Demag is too low
65 mV
0 V
Valley
Switching
Drain Level
Possible Demag
4 ms
Figure 13. Core Reset Detection is done through an Auxiliary Winding Operated in Forward
