NCP1205
http://onsemi.com
6
MAXIMUM RATINGS
Rating
Pin No.
Symbol
Value
Unit
PDIP−8 PDIP−14 SOIC−16 Min Max
Power Supply Voltage 8 13 14 V
in
− 30 V
Thermal Resistance Junction−to−Air PDIP−8
PDIP−14
SOIC−16
−
−
−
−
−
−
−
−
−
R
q
JA
−
−
100
100
145
°C/W
Operating Junction Temperature Range
Maximum Junction Temperature
−
−
−
−
−
−
T
J
T
Jmax
−
−
−25 to +125
150
°C
°C
Storage Temperature Range − − − T
stg
− −60 to +150 °C
ESD Capability, HBM Model All Pins All Pins All Pins − − 2.0 kV
ESD Capability, Machine Model All Pins All Pins All Pins − − 200 V
Demagnetization Pin Current 2 3 4 − − −5.0/+10 mA
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
ELECTRICAL CHARACTERISTICS (For typical values T
A
= 25°C, for min/max values T
J
= −25°C to +125°C, Max T
J
= 150°C,
V
CC
= 12 V unless otherwise noted.)
Characteristics
Pin No.
Symbol Min Typ Max Unit
PDIP−8 PDIP−14 SOIC−16
Demagnetization Block
Input Threshold Voltage (V
pin2
increasing) 2 3 4 Vth 50 65 85 mV
Hysteresis (V
pin2
decreasing) 2 3 4 V
H
− 30 − mV
Input Clamp Voltage
High State (I
pin2
= 3.0 mA)
Low State (I
pin2
= −3.0 mA)
2 3 4
VC
H
VC
L
8.0
−0.9
10
−0.7
12
−0.5
V
Demag Propagation Delay − − − − 100 300 350 ns
No Demag Signal Activation − − − − − 4.0 8.0
ms
Internal Input Capacitance at 1.0 V 2 3 4 C
pin2
− 10 − pF
Demag Propagation Delay with 22 kW External Resistor
2 3 4 − 100 370 480 ns
Feedback Path
Input Impedance at V
FB
= 3.0 V 3 4 5 Zin − 50 −
kW
Internal Error Amplifier Closed Loop Gain 3 4 5 AV
CL
− −3.0 − −
Internal Built−In Offset Voltage for Error Detection − − − V
ref
2.2 2.5 2.8 V
Error Amplifier Level of VCO Take Over − − − − − 1.0 − V
Internal Divider from Internal Error Amp, Pin to Current
Setpoint
− − − − − 3.0 − −
Fault Detection Circuitry
Internal Over Current Level
− − − WL
L
− 1.5 − V
Fault Time Duration to Latch Activation @ Ct = 1.0 ηF − − − − − 128 − ms
Over Current Latchoff Phase @ Ct = 1.0 ηF − − − − − 1.0 − s
Hysteresis when V
FB
goes back into Regulation − − − − − 100 − mV
Overvoltage Protection Threshold for PDIP−14 and
SOIC−16 versions
6 − 7 OVP1 2.5 2.8 3.1 V
Current Sense Comparator
Input Bias Current @ 1.0 V
6 11 12 I
IB
− 0.02 −
mA
Maximum Current Setpoint 6 11 12 V
cl
0.9 1.0 1.1 V
Minimum Current Setpoint 6 11 12 V
min
225 250 285 mV
