LT3959
10
3959fa
For more information www.linear.com/LT3959
INTV
CC
Low Dropout Voltage Regulators
The LT3959 features two internal low dropout (LDO) volt-
age regulators
(
V
IN
LDO and DRIVE LDO) powered from
different supplies (V
IN
and DRIVE respectively). Both LDO’s
regulate the internal INTV
CC
supply which powers the gate
driver and the internal loads, as shown in Figure 1. Both
regulators are designed so that current does not flow from
INTV
CC
to the LDO input under a reverse bias condition.
DRIVE LDO regulates the INTV
CC
to 4.75V, while V
IN
LDO
regulates the INTV
CC
to 3.75V. V
IN
LDO is turned off when
the INTV
CC
voltage is greater than 3.75V (typical). Both
LDO’s can be turned off if the INTV
CC
pin is driven by a
supply of 4.75V or higher but less than 8V (the INTV
CC
maximum voltage rating is 8V). A table of the LDO sup-
ply and output voltage combination is shown in Table 1.
Table 1. LDO’s Supply and Output Voltage Combination (Assuming
That the LDO Dropout Voltage is 0.15V)
SUPPLY VOLTAGES LDO OUTPUT
LDO STATUS
(Note 7)
V
IN
DRIVE INTV
CC
V
IN
≤ 3.9V V
DRIVE
< V
IN
V
IN
– 0.15V #1 Is ON
V
DRIVE
= V
IN
V
IN
– 0.15V #1 #2 are ON
V
IN
< V
DRIVE
< 4.9V V
DRIVE
– 0.15V #2 Is ON
4.9V ≤ V
DRIVE
≤ 40V 4.75V #2 Is ON
3.9V < V
IN
≤ 40V V
DRIVE
< 3.9V 3.75V #1 Is ON
V
DRIVE
= 3.9V 3.75V #1 #2 are ON
3.9V < V
DRIVE
< 4.9V V
DRIVE
– 0.15V #2 Is ON
4.9V ≤ V
DRIVE
≤ 40V 4.75V #2 Is ON
Note 7: #1 is V
IN
LDO and #2 is DRIVE LDO
The DRIVE pin provides flexibility to power the gate driver
and the internal loads from a supply that is available only
when the switcher is enabled and running. If not used,
the DRIVE pin should be tied to V
IN
.
The INTV
CC
pin must be bypassed to SGND immediately
adjacent to the INTV
CC
pin with a minimum of 4.7µF ceramic
capacitor. Good bypassing is necessary to supply the high
transient currents required by the MOSFET gate driver.
Operating Frequency and Synchronization
The choice of operating frequency may be determined
by on-chip power dissipation, otherwise it is a trade-off
between efficiency and component size. Low frequency op
-
eration improves efficiency by reducing gate drive current
and
internal MOSFET and diode switching losses. However,
lower frequency operation requires a physically larger
inductor. Switching frequency also has implications for
loop compensation. The LT3959 uses a constant-frequency
architecture that can be programmed over a 100kHz to
1MHz range with a single external resistor from the RT
pin to SGND, as shown in Figure 1. The RT pin must have
an external resistor to SGND for proper operation of the
LT3959. A table for selecting the value of R
T
for a given
operating frequency is shown in Table 2.
Table 2. Timing Resistor (R
T
) Value
OSCILLATOR FREQUENCY (kHz) R
T
(kΩ)
100 86.6
200 41.2
300 27.4
400 21.0
500 16.5
600 13.7
700 11.5
800 9.76
900 8.45
1000 6.81
The switching frequency of the LT3959 can be synchro-
nized to the positive edge of an external clock source.
By
providing a digital clock signal into the SYNC pin,
the LT3959 will operate at the SYNC clock frequency. If
this feature is used, an R
T
resistor should be chosen to
program a switching frequency 20% slower than SYNC
pulse frequency. The SYNC pulse should have a minimum
pulse width of 200ns. Tie the SYNC pin to SGND if this
feature is not used.
applicaTions inForMaTion
LT3959
11
3959fa
For more information www.linear.com/LT3959
Duty Cycle Consideration
Switching duty cycle is a key variable defining converter
operation. As such, its limits must be considered. Minimum
on-time is the smallest time duration that the LT3959 is
capable of turning on the internal power MOSFET. This time
is generally about 150ns (typical) (see Minimum On-Time
in the Electrical Characteristics table). In each switching
cycle, the LT3959 keeps the power switch off for at least
150ns (typical) (see Minimum Off-Time in the Electrical
Characteristics table).
The minimum on-time and minimum off-time and the
switching frequency define the minimum and maximum
switching duty cycles a converter is able to generate:
Minimum duty cycle = minimum on-timefrequency
Maximum duty cycle = 1 – (minimum off-timefrequency)
Programming the Output Voltage
The output voltage (V
OUT
) is set by a resistor divider, as
shown in Figure 1. The positive V
OUT
and negative V
OUT
are set by the following equations:
V
OUT(POSITIVE)
= 1.6V 1+
R2
R1
V
OUT(NEGATIVE)
= 0.8V 1+
R2
R1
The resistors R1 and R2 are typically chosen so that the
error caused by the current flowing into the FBX pin dur-
ing normal
operation is less than 1% (this translates to a
maximum value of R1 at about 121k).
Soft-Start
The
LT3959 contains several features to limit peak switch
currents and output voltage (V
OUT
) overshoot during
start-up or recovery from a fault condition. The primary
purpose of these features is to prevent damage to external
components or the load.
High peak switch currents during start-up may occur in
switching regulators. Since V
OUT
is far from its final value,
the feedback loop is saturated and the regulator tries to
charge the output capacitor as quickly as possible, resulting
in large peak currents. A large surge current may cause
inductor saturation or power switch failure.
LT3959 addresses this mechanism with the SS pin. As
shown in Figure 1, the SS pin reduces the internal power
MOSFET current by pulling down the V
C
pin through Q2.
In this way the SS allows the output capacitor to charge
gradually toward its final value while limiting the start-up
peak currents.
Besides start-up, soft-start can also
be triggered by
INTV
CC
undervoltage lockout and/or thermal lockout, which
causes the LT3959 to stop switching immediately. The SS
pin will be discharged by Q3. When all faults are cleared
and the SS pin has been discharged below 0.2V, a 10µA
current source I
S2
starts charging the SS pin, initiating a
soft-start operation.
The soft-start interval is set by the soft-start capacitor
selection according to the equation:
T
SS
= C
SS
1.25V
10µA
FBX Frequency Foldback
When V
OUT
is very low during start-up or a short-circuit
fault on the output, the switching regulator must operate
at low duty cycles to maintain the power switch current
within the current limit range, since the inductor current
decay rate is very low during switch off time. The minimum
on-time limitation may prevent the switcher from attaining
a sufficiently low duty cycle at the programmed switching
frequency. So, the switch current will keep increasing
through each switch cycle, exceeding the programmed
current limit. To prevent the switch peak currents from
exceeding the programmed value, the LT3959 contains
a frequency foldback function to reduce the switching
frequency when the FBX voltage is low (see the Normal
-
ized Switching
Frequency vs FBX graph in the Typical
Performance Characteristics section).
applicaTions inForMaTion
LT3959
12
3959fa
For more information www.linear.com/LT3959
Some frequency foldback waveforms are shown in the
Typical Applications section. The frequency foldback func-
tion prevents
I
L
from exceeding the programmed limits
because of the minimum on-time.
During frequency foldback, external clock synchronization
is disabled to allow the frequency reducing operation to
function properly.
Loop Compensation
Loop compensation determines the stability and transient
performance. The LT3959 uses current mode control to
regulate the output which simplifies loop compensation.
The optimum values depend on the converter topology, the
component values and the operating conditions (including
the input voltage, load current, etc.). To compensate the
feedback loop of the LT3959, a series resistor-capacitor
network is usually connected from the V
C
pin to SGND.
Figure 1 shows the typical V
C
compensation network. For
most applications, the capacitor should be in the range of
470pF to 22nF, and the resistor should be in the range of
5k to 50k. A small capacitor is often connected in paral
-
lel with the RC compensation network to attenuate the
V
C
voltage ripple induced from the output voltage ripple
through the internal error amplifier. The parallel capacitor
usually ranges in value from 10pF to 100pF. A practical
approach to design the compensation
network is to start
with one of the circuits in this data sheet that is similar
to your application, and tune the compensation network
to optimize the performance. Stability should then be
checked across all operating conditions, including load
current, input voltage and temperature.
The Internal Power Switch Current
For control and protection, the LT3959 measures the
internal power MOSFET current by using a sense resistor
(R
SENSE
) between GND and the MOSFET source. Figure 2
shows a typical wave-form of the internal switch current
(I
SW
).
Due to the current limit (minimum 6A) of the internal power
switch, the LT3959 should be used in the applications
that the switch peak current I
SW(PEAK)
during steady state
normal operation is lower than 6A by a sufficient margin
(10% or higher is recommended).
It is recommended to measure the IC temperature in steady
state to verify that the junction temperature limit (125°C) is
not exceeded. A low switching frequency may be required
to ensure T
J(MAX)
does not exceed 125°C.
If LT3959 die temperature reaches thermal lockout
threshold at 165°C (typical), the IC will initiate several
protective actions. The power switch will be turned off.
A soft-start
operation will
be triggered. The IC will be en-
abled again when the junction temperature has dropped
by 5°C (nominal).
APPLICA
TION CIRCUITS
The LT3959 can be configured as different topologies.
The design procedure for component selection differs
somewhat between these topologies. The first topology
to be analyzed will be the boost converter, followed by
SEPIC and inverting converters.
Figure 2. The SW Current During a Switching Cycle
applicaTions inForMaTion
3959 F02
I
SW(PEAK)
I
SW
I
SW
t
DT
S
T
S

LT3959EFE#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators Wide Input Voltage Range Boost/SEPIC/Inverting Converter with 5A, 40V Switch
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union