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74AVC20T245DGV,118
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
P16-P18
P19-P21
P22-P24
P25-P27
P28-P28
74A
VC20T245
All informatio
n provided in thi
s document is su
bject to legal
disclaimers.
© NXP B.V
. 2012. All rights reserv
ed.
Product data sheet
Rev
.
7 — 8 March 2012
3 of 27
NXP Semiconductors
74A
VC20T245
20-bit dual supp
ly translatin
g transceiver
; 3-st
ate
Pin numbers are shown for TSSOP56 packages only
.
Fig 2.
Logic symbol
001aal239
2
1OE
56
1
1DIR
V
CC(A)
V
CC(B)
55
1A1
3
54
1A2
5
52
1A3
6
51
1A4
8
49
1A5
9
48
1A6
10
47
1A7
12
45
1A8
13
44
1A9
14
43
1A10
1B1
1B2
1B3
1B4
1B5
1B6
1B7
1B8
1B9
1B10
15
2OE
29
28
2DIR
V
CC(A)
V
CC(B)
42
2A1
16
41
2A2
17
40
2A3
19
38
2A4
20
37
2A5
21
36
2A6
23
34
2A7
24
33
2A8
26
31
2A9
27
30
2A10
2B1
2B2
2B3
2B4
2B5
2B6
2B7
2B8
2B9
2B10
74A
VC20T245
All informatio
n provided in thi
s document is su
bject to legal
disclaimers.
© NXP B.V
. 2012. All rights reserv
ed.
Product data sheet
Rev
.
7 — 8 March 2012
4 of 27
NXP Semiconductors
74A
VC20T245
20-bit dual supp
ly translatin
g transceiver
; 3-st
ate
5. Pinning
information
5.1
Pinning
Fig 3.
Pin configuration
SOT364-1
(TSSOP56) and SOT481-2 (TSSOP56)
74A
VC20T245
1DIR
1OE
1B1
1A1
1B2
1A2
GND
GND
1B3
1A3
1B4
1A4
V
CC(B)
V
CC(A)
1B5
1A5
1B6
1A6
1B7
1A7
GND
GND
1B8
1A8
1B9
1A9
1B10
1A10
2B1
2A1
2B2
2A2
2B3
2A3
GND
GND
2B4
2A4
2B5
2A5
2B6
2A6
V
CC(B)
V
CC(A)
2B7
2A7
2B8
2A8
GND
GND
2B9
2A9
2B10
2A10
2DIR
2OE
001aal241
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
74A
VC20T245
All informatio
n provided in thi
s document is su
bject to legal
disclaimers.
© NXP B.V
. 2012. All rights reserv
ed.
Product data sheet
Rev
.
7 — 8 March 2012
5 of 27
NXP Semiconductors
74A
VC20T245
20-bit dual supp
ly translatin
g transceiver
; 3-st
ate
(1)
This is not a supply pin. The substrat
e
is attached to this pad us
ing conductive die attach mate
rial. There is no electrical
or
mechanical requirement to solder this pad. However
, if it is
soldered, the solder land should remain floating or be connected t
o
GND.
Fig 4.
Pin configuration SOT
1
134-2 (HXQFN60)
001aam129
74AVC20T245
D1
A32
A31
A30
A29
A28
A27
D4
B18
B19
B20
A1
A2
B8
B9
GND
(1)
B10
D7
D3
D6
D2
A11
A12
A13
A14
A15
A16
D8
A26
A25
A24
A23
A22
A21
A20
A19
A18
A17
B17
B16
B15
B14
B13
B12
B11
B1
B2
B3
B4
B5
B6
B7
A3
A4
A5
A6
A7
A8
A9
A10
D5
terminal A1
index area
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
P16-P18
P19-P21
P22-P24
P25-P27
P28-P28
74AVC20T245DGV,118
Mfr. #:
Buy 74AVC20T245DGV,118
Manufacturer:
NXP Semiconductors
Description:
Bus Transceivers 20-BIT DUAL-SUP XCVR W/CONFIG VOLT 3-S
Lifecycle:
New from this manufacturer.
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